PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 99

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 9-5:
 2003 Microchip Technology Inc.
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
OSFIF: Oscillator Fail Interrupt Flag bit
1 = System Oscillator failed, clock input has changed to INTOSC (must be cleared in software)
0 = System clock operating
Unimplemented: Read as ‘0’
EEIF: EEPROM or Flash Write Operation Interrupt Flag bit
1 = The write operation is complete (must be cleared in software)
0 = The write operation is not complete or has not been started
Unimplemented: Read as ‘0’
LVDIF: Low-Voltage Detect Interrupt Flag bit
1 = The supply voltage has fallen below the specified LVD voltage (must be cleared in
0 = The supply voltage is greater than the specified LVD voltage
Unimplemented: Read as ‘0’
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare mode:
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM mode:
Not used in PWM mode
bit 7
Legend:
R = Readable bit
- n = Value at POR
OSFIF
R/W-0
software)
U-0
—
PIC18F2331/2431/4331/4431
U-0
W = Writable bit
‘1’ = Bit is set
Preliminary
—
R/W-0
EEIF
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
R/W-0
LVDIF
x = Bit is unknown
U-0
—
DS39616B-page 97
CCP2IF
R/W-0
bit 0