PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 314

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2331/2431/4331/4431
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39616B-page 312
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
[ label ]
0
0
(f
None
The contents of source register ‘f
are moved to destination register
‘f
anywhere in the 4096 byte data
space (000h to FFFh) and location
of destination ‘f
where from 000h to FFFh.
Either source or destination can be
W (a useful special situation).
MOVFF is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register.
The MOVFF instruction should not
be used to modify interrupt settings
while any interrupt is enabled (see
the note on page 91).
2
2 (3)
MOVFF
d
Read
s
(src)
read
’. Location of source ‘f
)
1100
1111
No
Q2
=
=
=
=
f
f
s
d
f
d
0x33
0x11
0x33,
0x33
4095
4095
REG1, REG2
MOVFF f
ffff
ffff
operation
Process
Data
No
Q3
d
’ can also be any-
ffff
ffff
s
,f
d
s
register ‘f’
operation
’ can be
(dest)
Write
No
Q4
fff
fff
Preliminary
f
f
s
s
d
’
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR register
BSR register
Q1
Read literal
Move literal to low nibble in BSR
[ label ]
0
k
None
The 8-bit literal ‘k’ is loaded into
the Bank Select Register (BSR).
1
1
MOVLB
0000
Q2
‘k’
=
=
k
 2003 Microchip Technology Inc.
BSR
255
0x02
0x05
5
MOVLB k
0001
Process
Data
Q3
kkkk
literal ‘k’ to
Write
BSR
Q4
kkkk