PIC18F2510-I/ML Microchip Technology Inc., PIC18F2510-I/ML Datasheet - Page 171

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PIC18F2510-I/ML

Manufacturer Part Number
PIC18F2510-I/ML
Description
Microcontroller; 32 KB Flash; 1024 RAM; 0 EEPROM; 21 I/O; 28-Pin-QFN
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F2510-I/ML

A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin QFN
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2510-I/ML
Manufacturer:
MICORCHIP
Quantity:
662
15.4.5
The addressing procedure for the I
the first byte after the Start condition usually
determines which device will be the slave addressed by
the master. The exception is the general call address
which can address all devices. When this address is
used, all devices should, in theory, respond with an
Acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all ‘0’s with R/W = 0.
The general call address is recognized when the
General
(SSPxCON2<7> set). Following a Start bit detect, 8 bits
are shifted into the SSPxSR and the address is
compared against the SSPxADD. It is also compared to
the general call address and fixed in hardware.
FIGURE 15-15:
© 2006 Microchip Technology Inc.
GCEN (SSPxCON2<7>)
SSPOV (SSPxCON1<6>)
SDAx
SCLx
SSPxIF
BF (SSPxSTAT<0>)
Call
GENERAL CALL ADDRESS
SUPPORT
Enable
S
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE
(7 OR 10-BIT ADDRESS MODE)
bit,
1
2
GCEN,
General Call Address
2
C bus is such that
3
2
4
C protocol. It
is
5
enabled
6
Preliminary
7
R/W =
8
PIC18F45J10 FAMILY
0
If the general call address matches, the SSPxSR is
transferred to the SSPxBUF, the BF flag bit is set
(eighth bit) and on the falling edge of the ninth bit (ACK
bit), the SSPxIF interrupt flag bit is set.
When the interrupt is serviced, the source for the
interrupt can be checked by reading the contents of the
SSPxBUF. The value can be used to determine if the
address was device specific or a general call address.
In 10-bit mode, the SSPxADD is required to be updated
for the second half of the address to match and the UA
bit is set (SSPxSTAT<1>). If the general call address is
sampled when the GCEN bit is set, while the slave is
configured in 10-bit Address mode, then the second
half of the address is not necessary, the UA bit will not
be set and the slave will begin receiving data after the
Acknowledge (Figure 15-15).
ACK
Address is compared to General Call Address
after ACK, set interrupt
9
D7
1
D6
2
Cleared in software
SSPxBUF is read
Receiving Data
D5
3
D4
4
D3
5
D2
6
D1
7
DS39682B-page 169
D0
8
ACK
9
‘0’
‘1’

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