PIC18F2510-I/ML Microchip Technology Inc., PIC18F2510-I/ML Datasheet - Page 211

• Manufacturer Part Number: PIC18F2510-I/ML
• Description: Microcontroller; 32 KB Flash; 1024 RAM; 0 EEPROM; 21 I/O; 28-Pin-QFN
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2510-I/ML

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

17.0
The Analog-to-Digital (A/D) converter module has
10 inputs for the 28-pin devices and 13 for the 40/44-pin
devices. This module allows conversion of an analog
input signal to a corresponding 10-bit digital number.
The module has five registers:
• A/D Result High Register (ADRESH)
• A/D Result Low Register (ADRESL)
• A/D Control Register 0 (ADCON0)
• A/D Control Register 1 (ADCON1)
• A/D Control Register 2 (ADCON2)
REGISTER 17-1:
© 2006 Microchip Technology Inc.
10-BIT ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
bit 7
bit 6
bit 5-2
bit 1
bit 0
ADCON0: A/D CONTROL REGISTER 0
bit 7
ADCAL: A/D Calibration bit
1 = Calibration is performed on next A/D conversion
0 = Normal A/D converter operation
Unimplemented: Read as ‘0’
CHS3:CHS0: Analog Channel Select bits
0000 = Channel 0 (AN0)
0001 = Channel 1 (AN1)
0010 = Channel 2 (AN2)
0011 = Channel 3 (AN3)
0100 = Channel 4 (AN4)
0101 = Channel 5 (AN5)
0110 = Channel 6 (AN6)
0111 = Channel 7 (AN7)
1000 = Channel 8 (AN8)
1001 = Channel 9 (AN9)
1010 = Channel 10 (AN10)
1011 = Channel 11 (AN11)
1100 = Channel 12 (AN12
1101 = Unimplemented
1110 = Unimplemented
1111 = Unimplemented
GO/DONE: A/D Conversion Status bit
When ADON = 1:
1 = A/D conversion in progress
0 = A/D Idle
ADON: A/D On bit
1 = A/D converter module is enabled
0 = A/D converter module is disabled
Legend:
R = Readable bit
-n = Value at POR
ADCAL
R/W-0
Note 1: These channels are not implemented on 28-pin devices.
2: Performing a conversion on unimplemented channels will return a floating input
measurement.
U-0
—
(2)
(2)
(2)
(1,2)
(1,2)
(1,2)
R/W-0
CHS3
Preliminary
W = Writable bit
‘1’ = Bit is set
R/W-0
CHS2
PIC18F45J10 FAMILY
The ADCON0 register, shown in Register 17-1,
controls the operation of the A/D module. The
ADCON1 register, shown in Register 17-2, configures
the functions of the port pins. The ADCON2 register,
shown in Register 17-3, configures the A/D clock
source, programmed acquisition time and justification.
R/W-0
CHS1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
CHS0
GO/DONE
x = Bit is unknown
R/W-0
DS39682B-page 209
R/W-0
ADON
bit 0