PIC18F2510-I/ML Microchip Technology Inc., PIC18F2510-I/ML Datasheet - Page 67

• Manufacturer Part Number: PIC18F2510-I/ML
• Description: Microcontroller; 32 KB Flash; 1024 RAM; 0 EEPROM; 21 I/O; 28-Pin-QFN
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2510-I/ML

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

5.5.3
The use of Indexed Literal Offset Addressing mode
effectively changes how the first 96 locations of Access
RAM (00h to 5Fh) are mapped. Rather than containing
just the contents of the bottom half of Bank 0, this mode
maps the contents from Bank 0 and a user-defined
“window” that can be located anywhere in the data
memory space. The value of FSR2 establishes the
lower boundary of the addresses mapped into the
window, while the upper boundary is defined by FSR2
plus 95 (5Fh). Addresses in the Access RAM above
5Fh are mapped as previously described (see
Section 5.3.2 “Access Bank”). An example of Access
Bank remapping in this addressing mode is shown in
Figure 5-9.
FIGURE 5-9:
© 2006 Microchip Technology Inc.
Example Situation:
Locations in the region
from the FSR2 pointer
(120h) to the pointer plus
05Fh (17Fh) are mapped
to
Access RAM (000h-05Fh).
Locations in Bank 0 from
060h to 07Fh are mapped,
as usual, to the middle half
of the Access Bank.
Special File Registers at
F80h through FFFh are
mapped to 80h through
FFh, as usual.
Bank 0 addresses below
5Fh can still be addressed
by using the BSR.
ADDWF f, d, a
FSR2H:FSR2L = 120h
the
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET MODE
bottom
of
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL OFFSET
ADDRESSING
the
FFFh
05Fh
07Fh
17Fh
F00h
F80h
000h
100h
120h
200h
Data Memory
Window
Bank 14
Bank 15
through
Bank 1
Bank 0
Bank 0
Bank 1
Bank 2
SFRs
Preliminary
PIC18F45J10 FAMILY
Remapping of the Access Bank applies only to opera-
tions using the Indexed Literal Offset mode. Operations
that use the BSR (Access RAM bit is ‘1’) will continue
to use direct addressing as before.
5.6
Enabling the extended instruction set adds eight
additional commands to the existing PIC18 instruction
set. These instructions are executed as described in
Section 21.2 “Extended Instruction Set”.
PIC18 Instruction Execution and
the Extended Instruction Set
Bank 1 “Window”
Access Bank
Bank 0
SFRs
DS39682B-page 65
00h
5Fh
7Fh
80h
FFh