PIC18F2510-I/ML Microchip Technology Inc., PIC18F2510-I/ML Datasheet - Page 233

• Manufacturer Part Number: PIC18F2510-I/ML
• Description: Microcontroller; 32 KB Flash; 1024 RAM; 0 EEPROM; 21 I/O; 28-Pin-QFN
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2510-I/ML

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 20-1:
REGISTER 20-2:
© 2006 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4-1
bit 0
bit 7-3
bit 2
bit 1-0
CONFIG1L: CONFIGURATION REGISTER 1 LOW (BYTE ADDRESS 300000h)
CONFIG1H: CONFIGURATION REGISTER 1 HIGH (BYTE ADDRESS 300001h)
bit 7
Unimplemented: Read as ‘0’
CP0: Code Protection bit
1 = Program memory is not code-protected
0 = Program memory is code-protected
Unimplemented: Read as ‘0’
bit 7
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Reset on stack overflow/underflow enabled
0 = Reset on stack overflow/underflow disabled
Unimplemented: Read as ‘0’
WDTEN: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled (control is placed on SWDTEN bit)
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Legend:
R = Readable bit
-n = Value when device is unprogrammed
R/WO-1
DEBUG
Note 1: This bit should always be maintained as ‘0’.
U-0
—
R/WO-1
XINST
U-0
—
STVREN
R/WO-1
WO = Write-once bit
WO = Write-once bit
U-0
Preliminary
—
PIC18F45J10 FAMILY
U-0
U-0
—
—
—
U-0
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
U-0
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
—
(1)
R/WO-1
CP0
U-0
—
‘0’ = Bit is cleared
‘0’ = Bit is cleared
U-0
U-0
—
—
DS39682B-page 231
WDTEN
R/WO-1
U-0
—
bit 0
bit 0