PIC18F2510-I/ML Microchip Technology Inc., PIC18F2510-I/ML Datasheet - Page 232

• Manufacturer Part Number: PIC18F2510-I/ML
• Description: Microcontroller; 32 KB Flash; 1024 RAM; 0 EEPROM; 21 I/O; 28-Pin-QFN
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2510-I/ML

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin QFN
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F45J10 FAMILY
TABLE 20-1:
DS39682B-page 230
300000h CONFIG1L
300001h CONFIG1H
300002h CONFIG2L
300003h CONFIG2H
300004h CONFIG3L
300005h CONFIG3H
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note 1:
File Name
2:
3:
4:
x = unknown, u = unchanged, - = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Values reflect the unprogrammed state as received from the factory and following Power-on Resets. In all other Reset
states, the configuration bytes maintain their previously programmed states.
The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if it
is accidentally executed.
This bit should always be maintained as ‘0’.
See Register 20-7 and Register 20-8 for DEVID values. These registers are read-only and cannot be programmed by
the user.
CONFIGURATION BITS AND DEVICE IDs
DEBUG
DEV10
DEV2
IESO
Bit 7
—
—
—
—
(2)
(2)
(2)
FCMEN
XINST
DEV1
DEV9
Bit 6
—
—
—
—
(2)
(2)
(2)
STVREN
DEV0
DEV8
Bit 5
—
—
—
—
—
(2)
(2)
(2)
Preliminary
REV4
DEV7
Bit 4
—
—
—
—
—
—
(2)
(2)
(2)
WDTPS3 WDTPS2
REV3
DEV6
Bit 3
—
—
—
—
—
(3)
FOSC2
REV2
DEV5
Bit 2
CP0
—
—
—
WDTPS1
FOSC1
REV1
DEV4
Bit 1
—
—
—
—
© 2006 Microchip Technology Inc.
WDTPS0
CCP2MX
WDTEN
FOSC0
REV0
DEV3
Bit 0
—
—
Unprogrammed
111- ---1
---- x1--
11-- -111
---- 1111
---- ----
---- ---1
xxxx xxxx
0001 110x
Default/
Value
(1)
(4)
(4)