PEB20591HV22XP Lantiq, PEB20591HV22XP Datasheet - Page 35

• Manufacturer Part Number: PEB20591HV22XP
• Manufacturer: Lantiq

Specifications of PEB20591HV22XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY
3.3.3.2
• Programmed by DELIC IOM-2000 Command bits:
• In LT-T applications, the VIP/DELIC system operates as slave to the central office
• The 192-kHz receive bit timing is recovered (via RxPLL) from the receive data stream
• The RxPLL also provides a 1.536-MHz clock synchronous to the Central Office clock
• If several VIP or several S/T lines are operated in LT-T mode, only one trunk line may
Note: In LT-T mode, the transmit clock is identical to the recovered receive clock.
Note: The recommended setting for short passive bus in LT-T mode is
Figure 17
Data Sheet
MOSEL (1:0) = ’00’, MODE(2:0) = ’001’
clock.
on the trunk line interface that was selected as clock source.
(adaptive timing recovery), which in LT-T applications is used to synchronize the
DELIC clock generator via the IOM-2000 REFCLK line; refer to
The RxPLL tracks every 250 s after detecting the phase between the framing bit
transition (F/L-bit in S/T frame) of the receive signal and the recovered clock. A phase
adjustment is done by adding or subtracting 65 ns or 130 ns to or from the 15.36-MHz
clock depending on ’PLLS’.
be selected to deliver the reference clock. The selection of this trunk line is
programmed by the DELIC via IOM-2000 Command bits REFSEL(2:0) and EXREF.
CO
CO
192 kHz
192 kHz
TICCMR:OWIN=’101’ and TICCMR:PD=’1’. For detailed description please
refer to VIP channel config command in the DELIC-LC/-PB SW User’s
Manual.
LT-T Mode
Clock Recovery in LT-T Mode
RxPLL
RxPLL
OSC
(up to 4 or 8 ch.)
clock = 192 kHz
clock = 192 kHz
Data
15.36 MHz
FIFO
MUX
FIFO
27
VIP
3.072/6.144/12.288
1.536 MHz
REFCLK
DCL_2000
DR
MHz
Interface Description
Figure
15.36 MHz
DELIC
17.
VIP-LTT-Ref.vsd
PEB 20590
PEB 20591
2001-03-01