PEB20591HV22XP Lantiq, PEB20591HV22XP Datasheet - Page 45

• Manufacturer Part Number: PEB20591HV22XP
• Manufacturer: Lantiq

Specifications of PEB20591HV22XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY
4.4
Different analog test loops may be switched in the VIP near to the S/T or U
interfaces. No external U
• Transparent analog loop, data forward path enabled
• Non-transparent analog loop, data forward path blocked
• External transparent analog loop, for board testing.
Initialization of Test Loops
Unlike the LT-T state machine, the LT-S and U
support loops. Consequently neither the C/I commands nor indications are provided by
the mailbox protocol. A loop can be programmed by setting bits TICCMR:LOOP and
TICCMR:EXLP for the respective channel.
Note: For detailed description please refer also to the Application Note ’Test loops in the
Transparency
In U
line interface. The selection is performed via IOM-2000 TX_EN command. External
analog loops are activated by EXLP Command bit (refer to
Note: In order to guaranty that the loop is closed TX_EN must be set to one for the U
4.5
Any code violation on the S/T interface (according to ANSI T1.605), or code violations at
positions other than the F-bit or M-bit in the U
sent to DELIC. The check is performed once in every multiframe (every 20th 4-kHz S/T
frame). To synchronize the checking, DELIC must issue the SH_FSC bit every 40th IOM
frame.
Data Sheet
PN
VIP’.
Interface
or LT-S mode, the user may output the loop-back data also transparently onto the
Analog Test Loops
Monitoring of Code Violations
PN
or S/T interface circuitry is required to close these loops:
37
PN
frame result in VIP Status bit FECV being
PN
state machines in the DELIC do not
Chapter
Operational Description
6.3).
PEB 20590
PEB 20591
2001-03-01
PN
line
PN