PEB20591HV22XP Lantiq, PEB20591HV22XP Datasheet - Page 50
PEB20591HV22XP
Manufacturer Part Number
PEB20591HV22XP
Description
Manufacturer
Lantiq
Datasheet
1.PEB20591HV22XP.pdf
(63 pages)
Specifications of PEB20591HV22XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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PRELIMINARY
Data Sheet
5.6
T
Note: Timing measurements are made at 2.0 V for a logical 1’ and at 0.8 V for a
Figure 24
5.7
•
Parameter
High phase of clock
Low phase of clock
Clock period
5.8
Parameter
DIR delay from DCL_2000
rising edge
A
= 0 to 70 C;
logical ’0’.
AC Characteristics
REFCLK
U
pn
Input/Output Wave Form for AC Tests
V
Interface
DD
= 3.3 V
0.17 V
Symbol
t
t
T
Symbol
t
WH
WL
DIR
P
min.
min.
42
Limit Values
Limit Values
651
max.
40
40
max.
60
Electrical Characteristics
Unit Comment
ns
ns
ns
Unit Comment
ns
Delay of falling
edge after falling
edge of INCLK
Delay of rising
edge after rising
edge of INCLK
During PLL
adjustment this
value could
change
PEB 20590
PEB 20591
50 pF
2001-03-01
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