PEB20591HV22XP Lantiq, PEB20591HV22XP Datasheet - Page 44

• Manufacturer Part Number: PEB20591HV22XP
• Manufacturer: Lantiq

Specifications of PEB20591HV22XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

PRELIMINARY
Data Sheet
4
After some general remarks on the operation of the DELIC & VIP chipset, the reset and
the initialization procedure are described. The operation of analog test loops as well as
the monitoring of illegal code violations are also part of this chapter.
4.1
The DELIC & VIP chipset provides all functionality required for data transmission over
the U
deactivation, frame and multiframe synchronization.
The U
deactivation, switching of loops and transmission of test pulse patterns. Such actions
can be initiated by INFO signals on the U
to DELIC, and transferred to VIP via the IOM-2000 Command and Status interface. All
options and register settings are described in the DELIC Data Sheet.
4.2
• At power-up, a reset pulse (RESET = low active) of at least 1 s must be applied to
• The source of the reset can be either the microprocessor, or the DELIC RESIND pin,
4.3
After hardware reset, each VIP must be initialized and configured by IOM-2000
commands. The following steps are required to initialize the VIP:
1. DELIC: Hardware Reset (to synchronize the state machines, counters etc.)
2. VIP: Hardware Reset
3. Release resets
4. Read version register from VIP-CMD register (optional) (available from VIP version
5. Program the VIP if required, e.g. LT-T clock source
6. DELIC: Program VIP channel mode: U
7. DELIC: Configure each VIP receiver if required, e.g. oversampling, D-channel
reset the line interfaces of the VIP.
which is a delayed reset signal. This assures that the VIP is always reset
simultaneously with the DELIC, and receives stable clock signals by the DELIC after
reset.
V2.1 and higher)
handling.
PN
PN
and the S/T interface, e.g., initialization and configuration, activation and
and S/T layer-1 state machines run on DELIC’s DSP, performing activation/
Operational Description
General
Reset
Initialization
PN
PN
36
and S/T lines, or by C/I codes sent by the µP
, LT-S or LT-T, closing test loops
Operational Description
PEB 20590
PEB 20591
2001-03-01