MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 203

• Manufacturer Part Number: MM912H634CV1AE
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AE

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.32.3.2.4
Read: Anytime
Write: Anytime the module is disarmed.
This register configures the comparators for range matching.
4.32.3.2.5
Read: Only when unlocked AND unsecured AND not armed AND TSOURCE set.
Write: Aligned word writes when disarmed unlock the trace buffer for reading but do not affect trace buffer contents.
Freescale Semiconductor
Address:
Address: 0x0023
Resets
Other
Reset
ABCM[1:0]
POR
W
W
R
R
Field
1–0
Note:
177.
ABCM
0x0024, 0x0025
Bit 15
15
—
00
01
10
11
X
Currently defaults to Comparator A, Comparator B disabled
A and B Comparator Match Control — These bits determine the A and B comparator match mapping as described in
7
0
0
Debug Control Register2 (DBGC2)
Debug Trace Buffer Register (DBGTBH:DBGTBL)
Bit 14
14
—
X
TRCMOD
Bit 13
00
01
10
11
13
—
X
6
0
0
= Unimplemented or Reserved
Bit 12
Match0 mapped to comparator A match: Match1 mapped to comparator B match.
12
—
X
Table 282. Debug Trace Buffer Register (DBGTB)
Table 278. TRCMOD Trace Mode Bit Encoding
Table 279. Debug Control Register2 (DBGC2)
Match 0 mapped to comparator A/B outside range: Match1 disabled.
Bit 11
Match 0 mapped to comparator A/B inside range: Match1 disabled.
11
—
X
Table 280. DBGC2 Field Descriptions
MM912_634 Advance Information, Rev. 4.0
5
0
0
Bit 10
Table 281. ABCM Encoding
10
—
X
Bit 9
—
9
X
4
0
0
Compressed Pure PC
Bit 8
—
Reserved
8
X
Description
Description
Description
Normal
Loop1
Detail
Bit 7
—
7
X
(177)
3
0
0
Bit 6
—
X
6
Bit 5
—
X
5
2
0
0
Bit 4
—
X
4
Bit 3
—
X
3
1
0
Bit 2
—
2
X
ABCM
Bit 1
—
X
1
Table
0
0
Bit 0
281.
—
X
0
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