MM912H634CV1AE Freescale Semiconductor, MM912H634CV1AE Datasheet - Page 249

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MM912H634CV1AE

Manufacturer Part Number
MM912H634CV1AE
Description
64KS12 LIN2xLS/HS Isense
Manufacturer
Freescale Semiconductor
Series
-r
Datasheet

Specifications of MM912H634CV1AE

Applications
Automotive
Core Processor
HCS12
Program Memory Type
FLASH (64 kB)
Controller Series
HCS12
Ram Size
6K x 8
Interface
LIN
Number Of I /o
-
Voltage - Supply
5.5 V ~ 27 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
48-LQFP Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Freescale Semiconductor
Note:
185.
RTR[6:4]
RTR[3:0]
RTDEC
Field
6–4
3–0
1001 (10)
1010 (11)
1011 (12)
1100 (13)
1101 (14)
1110 (15)
1111 (16)
7
RTR[3:0]
0000 (1)
0001 (2)
RTR[3:0]
0000 (1)
0001 (2)
0010 (3)
0011 (4)
0100 (5)
0101 (6)
0110 (7)
0111 (8)
1000 (9)
Denotes the default value out of reset.This value should be used to disable the RTI to ensure future backwards compatibility.
Decimal or Binary Divider Select Bit — RTDEC selects decimal or binary based prescaler values.
Real Time Interrupt Prescale Rate Select Bits — These bits select the prescale rate for the RTI. See
Table
Real Time Interrupt Modulus Counter Select Bits — These bits select the modulus counter target value to provide additional
granularity.Table 354
0
1
355.
Binary based divider value. See
Decimal based divider value. See
OFF
(1x10
1x10
2x10
(OFF)
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
000
000
(185)
3
3
3
)
and
Table 354. RTI Frequency Divide Rates for RTDEC = 0
Table 355. RTI Frequency Divide Rates for RTDEC=1
(2x10
Table 355
2x10
4x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
001
(2
001
2
10
10
Table 353. CPMURTI Field Descriptions
10
10
10
10
10
10
10
10
10
3
3
10
10
10
10
10
10
3
)
)
MM912_634 Advance Information, Rev. 4.0
show all possible divide values selectable by the CPMURTI register.
(5x10
10x10
5x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
Table 354
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
010
(2
010
2
Table 355
11
11
11
11
11
11
11
11
11
11
3
3
11
)
11
11
11
11
11
11
3
)
(10x10
10x10
20x10
Description
10x2
11x2
12x2
13x2
14x2
15x2
16x2
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
011
(2
011
2
12
12
12
12
12
12
12
12
12
12
12
RTR[6:4] =
RTR[6:4] =
12
12
12
12
12
12
)
3
3
3
)
(20x10
20x10
40x10
10x2
12x2
13x2
14x2
15x2
16x2
11x2
100
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
(2
100
2
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
3
3
)
3
)
(50x10
100x10
50x10
10x2
11x2
12x2
13x2
14x2
15x2
16x2
101
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
(2
101
2
14
14
14
14
14
14
14
14
14
14
14
3
3
14
14
14
14
14
14
)
3
)
(100x10
100x10
200x10
10x2
12x2
13x2
14x2
15x2
16x2
11x2
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
110
(2
110
2
15
15
Table 354
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
)
3
3
3
)
(200x10
200x10
400x10
and
10x2
11x2
12x2
13x2
14x2
15x2
16x2
2x2
3x2
4x2
5x2
6x2
7x2
8x2
9x2
(2
111
111
2
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
)
3
3
3
249
)

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