ELLXT971ABE.A4 Intel, ELLXT971ABE.A4 Datasheet - Page 41
ELLXT971ABE.A4
Manufacturer Part Number
ELLXT971ABE.A4
Description
IC TRANS 3.3V ETHERNET 64-BGA
Manufacturer
Intel
Type
PHY Transceiverr
Datasheet
1.ELLXT971ABE.A4.pdf
(110 pages)
Specifications of ELLXT971ABE.A4
Number Of Drivers/receivers
1/1
Protocol
IEEE 802
Voltage - Supply
3.14 V ~ 3.45 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
870479
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Part Number
Manufacturer
Quantity
Price
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Part Number:
ELLXT971ABE.A4-870479
Manufacturer:
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Quantity:
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Part Number:
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5.6
Datasheet
Document Number: 249414-003
Revision Date: June 18, 2004
MII Operation
This section includes the following topics:
The LXT971A Transceiver implements the Media Independent Interface (MII) as defined by the
IEEE 802.3 standard. Separate channels are provided for transmitting data from the MAC to the
LXT971A Transceiver (TXD), and for passing data received from the line (RXD) to the MAC.
Each channel has its own clock, data bus, and control signals.
The following signals are used to pass received data to the MAC:
The following signals are used to transmit data from the MAC:
The LXT971A Transceiver supplies both clock signals as well as separate outputs for carrier sense
and collision. Data transmission across the MII is normally implemented in 4-bit-wide nibbles.
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Section 5.6.1, “MII Clocks”
Section 5.6.2, “Transmit Enable”
Section 5.6.3, “Receive Data Valid”
Section 5.6.4, “Carrier Sense”
Section 5.6.5, “Error Signals”
Section 5.6.6, “Collision”
Section 5.6.7, “Loopback”
COL
CRS
RX_CLK
RX_DV
RX_ER
RXD[3:0]
TX_CLK
TX_EN
TX_ER
TXD[3:0]
Intel
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
41