ELLXT971ABE.A4 Intel, ELLXT971ABE.A4 Datasheet - Page 92

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ELLXT971ABE.A4

Manufacturer Part Number
ELLXT971ABE.A4
Description
IC TRANS 3.3V ETHERNET 64-BGA
Manufacturer
Intel
Type
PHY Transceiverr
Datasheet

Specifications of ELLXT971ABE.A4

Number Of Drivers/receivers
1/1
Protocol
IEEE 802
Voltage - Supply
3.14 V ~ 3.45 V
Mounting Type
Surface Mount
Package / Case
64-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
870479

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Intel
92
Table 49. Auto-Negotiation Advertisement Register - Address 4, Hex 4
®
LXT971A Single-Port 10/100 Mbps PHY Transceiver
Table 49
1. R/W = Read/Write
2. Default setting is determined by pin 33/H8 at reset.
3. Some bits have their default values determined at reset by hardware configuration pins. For default details
4.4:0
4.15
4.14
4.13
4.12
4.11
4.10
Bit
4.9
4.8
4.7
4.6
4.5
RO = Read Only
for these bits, see
lists auto-negotiation advertisement bits.
Next Page
Reserved
Remote Fault
Reserved
Asymmetric
Pause
Pause
100BASE-T4
100BASE-TX
Full-duplex
100BASE-TX
10BASE-T
Full-duplex
10BASE-T
Selector Field,
S<4:0>
Name
Section 5.4.4, “Hardware Configuration
0 = Port has no ability to send multiple pages.
1 = Port has ability to send multiple pages.
Ignore when read.
0 = No remote fault.
1 = Remote fault.
Write as ‘0’. Ignore on Read.
Pause operation defined in IEEE 802.3 Standard,
Clause 40 and 27
0 = Pause operation disabled.
1 = Pause operation enabled for full-duplex links.
0 = 100BASE-T4 capability is not available.
1 = 100BASE-T4 capability is available.
NOTE: The LXT971A Transceiver does not support
0 = Port is not 100BASE-TX full-duplex capable.
1 = Port is 100BASE-TX full-duplex capable.
0 = Port is not 100BASE-TX capable.
1 = Port is 100BASE-TX capable.
0 = Port is not 10BASE-T full-duplex capable.
1 = Port is 10BASE-T full-duplex capable.
0 = Port is not 10BASE-T capable.
1 = Port is 10BASE-T capable.
<00001> = IEEE 802.3.
<00010> = IEEE 802.9 ISLAN-16T.
<00000> = Reserved for future auto-negotiation
development.
<11111> = Reserved for future auto-negotiation
development
NOTE: Unspecified or reserved combinations must
100BASE-T4 but allows this bit to be set to
advertise in the auto-negotiation sequence
for 100BASE-T4 operation. An external
100BASE-T4 Transceiver can be switched
in if this capability is desired.
not be transmitted.
Description
Settings”.
Document Number: 249414-003
Revision Date: June 18, 2004
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
1
Datasheet
Default
Note 2
Note 3
Note 3
Note 3
Note 3
00001
0
0
0
0
0
0

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