SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 102
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SAA7114HV2
Manufacturer Part Number
SAA7114HV2
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7114HV2.pdf
(144 pages)
Specifications of SAA7114HV2
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Philips Semiconductors
SAA7114_3
Product data sheet
10.4.3 Subaddress 58h
10.4.4 Subaddress 59h
10.4.5 Subaddress 5Ah
10.4.6 Subaddress 5Bh
10.4.7 Subaddress 5Dh
Table 73:
According to
Table 74:
Table 75:
Table 76:
See
Table 77:
Framing code for programmable data types
Default value
Recommended value
Vertical offset
Minimum value 0
Maximum value 312
Value for 50 Hz 625 lines input
Value for 60 Hz 525 lines input
Bit
D7
D6
Bit
D7
D[5:0]
Horizontal offset
Section 10.4.4
Description Symbol
field offset
recode
Description
field ID and V-blank
selection for text output
(F and V reference
selection)
default; DID[5:0] = 00h
special cases of DID
programming
Programmable framing code; slicer set 58h[7:0]
Horizontal offset for slicer; slicer set 59h and 5Bh
Vertical offset for slicer; slicer set 5Ah and 5Bh
Field offset, and MSBs for horizontal and vertical offsets; slicer set 5Bh[7:6]
Header and data identification (DID; ITU 656) code control; slicer set 5Dh[7:0]
Table 15
and
and
Section 10.4.5
FOFF
RECODE 0
Rev. 03 — 17 January 2006
Table
72.
Control bits 5Bh[2:0]
HOFF[10:8] = 3h
Control bit 5Bh[4]
VOFF8
0
1
0
0
Value
0
1
1
Symbol Value
FVREF
DID[5:0] 00 0000
for HOFF[10:8] 5Bh[2:0] and VOFF8[5Bh[4]].
Function
no modification of internal field indicator (default for
50 Hz 625 lines input sources)
invert field indicator (default for 60 Hz 525 lines input
sources)
leave data unchanged (default)
convert 00h and FFh data bytes into 03h and FCh
0
1
11 1110
11 1111
PAL/NTSC/SECAM video decoder
Function
F and V output of slicer is LCR table
dependent
F and V output is taken from decoder
real-time signals EVEN_ITU and
VBLNK_ITU
ANC header framing; see
and
DID[5:0] = 3Eh SAV/EAV framing, with
FVREF = 1
DID[5:0] = 3Fh SAV/EAV framing, with
FVREF = 0
Table 21
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Control bits D7 to D0
FC[7:0] = 40h
Control bits 59h[7:0]
HOFF[7:0] = 47h
Control bits 5Ah[7:0]
VOFF[7:0]
00h
38h
03h
06h
SAA7114
Figure 33
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