SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 75
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
SAA7114HV2
Manufacturer Part Number
SAA7114HV2
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7114HV2.pdf
(144 pages)
Specifications of SAA7114HV2
Lead Free Status / Rohs Status
Compliant
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Philips Semiconductors
SAA7114_3
Product data sheet
Fig 38. Output timing for 16-bit data output via I port and H port with codes (ICODE = 1), timing is like 8-bit output,
Fig 39. H gate and V gate output timing
Fig 40. Output timing for sliced VBI data in 8-bit serial output mode (dotted graphs for SAV/EAV mode)
flag on IGP0
HPD [ 7:0 ]
sliced data
IPD [ 7:0 ]
HPD [ 7:0 ]
IPD [ 7:0 ]
or IGP1
IGPH
IGPH
but packages of 2 bytes per valid cycle
IGPV
ICLK
IDQ
IDQ
ICLK
IDQ
00
00
00
00
FF
00
FF
00
SAV
00
FF
00
00
00
FF
00
C B
Y0
SAV
DID
Y1
C
SDID
R
Rev. 03 — 17 January 2006
00
00
XX
Y2
C
B
YY
C
Y3
R
ZZ
CS
Y
PAL/NTSC/SECAM video decoder
C
n 1
B
BC
BC
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
C
Y n
R
00
FF
00
00
00
00
SAA7114
FF
00
00
00
EAV
mhb555
00
EAV
mhb554
mhb733
75 of 144
00
00
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