SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 111
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SAA7114HV2
Manufacturer Part Number
SAA7114HV2
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7114HV2.pdf
(144 pages)
Specifications of SAA7114HV2
Lead Free Status / Rohs Status
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Philips Semiconductors
SAA7114_3
Product data sheet
Table 102: X port input reference signal definitions; register set A [92h[7:4]] and
[1]
Table 103: X port input reference signal definitions; register set A [92h[3:0]] and
[1]
Table 104: I port output format and configuration; register set A [93h[7:5]] and
X port input reference signal definitions
Rising edge of XRV input and decoder V123 is
vertical reference
Falling edge of XRV input and decoder V123 is
vertical reference
XRV is a V-sync or V gate signal
XRV is a frame sync, V pulses are generated
internally on both edges of FS input
X port field ID is state of XRH at reference edge on
XRV (defined by XFDV)
Field ID (decoder and X port field ID) is inverted
Reference edge for field detection is falling edge of
XRV
Reference edge for field detection is rising edge of
XRV
X port input reference signal definitions
XCLK input clock and XDQ input qualifier are needed X
Data rate is defined by XCLK only, no XDQ signal
used
Data are qualified at XDQ input at logic 1
Data are qualified at XDQ input at logic 0
Rising edge of XRH input is horizontal reference
Falling edge of XRH input is horizontal reference
Reference signals are taken from XRH and XRV
Reference signals are decoded from EAV and SAV
I port output formats and configuration
All lines will be output
Skip the number of leading Y only lines, as defined by FOI1 and FOI0
Dwords are transferred byte wise, see subaddress 85h bits ISWP1
and ISWP0
X = don’t care.
X = don’t care.
B [C2h[7:4]]
B [C2h[3:0]]
B [C3h[7:5]]
Rev. 03 — 17 January 2006
[1]
[1]
[1]
Control bits D7 to D4
XFDV
X
X
X
X
X
X
0
1
Control bits D3 to D0
XCODE
X
X
X
X
X
0
1
PAL/NTSC/SECAM video decoder
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
XFDH
X
X
X
X
0
1
X
X
XDH
X
X
X
X
0
1
X
X
Control bits D7 to D5
ICODE I8_16
X
X
X
SAA7114
XDV1
X
X
0
1
X
X
X
X
XDQ
X
X
0
1
X
X
X
X
X
X
0
XDV0
0
1
X
X
X
X
X
X
XCKS
0
1
X
X
X
X
X
X
111 of 144
FYSK
0
1
X
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