SAA7114HV2 NXP Semiconductors, SAA7114HV2 Datasheet - Page 2

• Manufacturer Part Number: SAA7114HV2
• Manufacturer: NXP Semiconductors

Specifications of SAA7114HV2

• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
2. Features
SAA7114_3
Product data sheet
2.1 Video decoder
2.2 Video scaler
Six analog inputs, internal analog source selectors, e.g. 6
2
Two analog preprocessing channels in differential CMOS style inclusive built-in analog
anti-alias filters
Fully programmable static gain or Automatic Gain Control (AGC) for the selected
CVBS or Y/C channel
Automatic Clamp Control (ACC) for CVBS, Y and C
Switchable white peak control
Two 9-bit video CMOS ADCs, digitized CVBS or Y/C signals are available on the
expansion port
On-chip line-locked clock generation in accordance with “ITU 601”
Digital Phase-Locked Loop (PLL) for synchronization and clock generation from all
standards and non-standard video sources e.g. consumer grade VTR
Requires only one crystal (32.11 MHz or 24.576 MHz) for all standards
Horizontal and vertical sync detection
Automatic detection of 50 Hz and 60 Hz field frequency, and automatic switching
between PAL and NTSC standards
Luminance and chrominance signal processing for PAL B, G, D, H, I and N,
combination PAL N, PAL M, NTSC M, NTSC-Japan, NTSC 4.43 and SECAM
Adaptive 2/4-line comb filter for two dimensional chrominance/luminance separation:
PAL delay line for correcting PAL phase errors
Independent Brightness Contrast Saturation (BCS) adjustment for decoder part
User programmable sharpness control
Independent gain and offset adjustment for raw data path
Horizontal and vertical downscaling and upscaling to randomly sized windows
Horizontal and vertical scaling range: variable zoom to
that the H and V zoom are restricted by the transfer data rates)
Anti-alias and accumulating filter for horizontal scaling
Vertical scaling with linear phase interpolation and accumulating filter for anti-aliasing
(6-bit phase accuracy)
Horizontal phase correct up and downscaling for improved signal quality of scaled
data, especially for compression and video phone applications, with 6-bit phase
accuracy (1.2 ns step width)
Two independent programming sets for scaler part, to define two ‘ranges’ per field or
sequences over frames
Fieldwise switching between decoder part and expansion port (X port) input
Brightness, contrast and saturation controls for scaled outputs
Increased luminance and chrominance bandwidth for all PAL and NTSC standards
Reduced cross color and cross luminance artefacts
CVBS) or (1
Y/C and 4
Rev. 03 — 17 January 2006
CVBS)
PAL/NTSC/SECAM video decoder
1
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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(icon) (it should be noted
CVBS or (2
SAA7114
Y/C and
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