AOZ1031AI Alpha & Omega Semiconductor Inc, AOZ1031AI Datasheet - Page 10

• Manufacturer Part Number: AOZ1031AI
• Description: IC BUCK SYNC ADJ 3A SO8
• Manufacturer: Alpha & Omega Semiconductor Inc
• Series: EZBuck™r
• Type: Step-Down (Buck), PWM - Current Moder

Specifications of AOZ1031AI

• Featured Product: The AOZ103x Family Synchronous Buck Regulator
• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 V ~ 18 V
• Current - Output: 3A
• Frequency - Switching: 600kHz
• Voltage - Input: 4.5 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 785-1253-2

In a buck converter, output capacitor current is continu-
ous. The RMS current of output capacitor is decided by
the peak to peak inductor ripple current. It can be calcu-
lated by:
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and induc-
tor ripple current is high, output capacitor could be over-
stressed.
Loop Compensation
The AOZ1031A employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole can be
calculated by:
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
where;
C
R
ESR
The compensation design is actually to shape the con-
verter control loop transfer function to get desired gain
and phase. Several different types of compensation net-
work can be used for the AOZ1031A. For most cases, a
series capacitor and resistor network connected to the
COMP pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
In the AOZ1031A, FB pin and COMP pin are the inverting
input and the output of internal error amplifier. A series R
and C compensation network connected to COMP pro-
vides one pole and one zero. The pole is:
I
f
f
CO_RMS
P2
O
L
Z1
f
Rev. 1.6 March 2010
P1
is load resistor value, and
is the output filter capacitor,
CO
=
=
=
is the equivalent series resistance of output capacitor.
------------------------------------------ -
2π
------------------------------------------------
2π C
---------------------------------- -
2π
=
×
×
×
C
----------
ΔI
G
C
C
O
12
1
EA
O
L
×
1
×
×
G
ESR
R
VEA
L
CO
www.aosmd.com
where;
G
200 x 10
G
C
The zero given by the external compensation network,
capacitor C
To design the compensation circuit, a target crossover
frequency f
crossover frequency is where control loop has unity gain.
The crossover is the also called the converter bandwidth.
Generally a higher bandwidth means faster response to
load transient. However, the bandwidth should not be too
high because of system stability concern. When design-
ing the compensation loop, converter stability under all
line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of switching frequency. The
AOZ1031A operates at a frequency range from 500kHz
to 700kHz. It is recommended to choose a crossover fre-
quency equal or less than 40kHz.
The strategy for choosing R
over frequency with R
with C
late R
where;
f
set to be about 1/10 of switching frequency,
V
G
200 x 10
G
A/V.
The compensation capacitor C
make a zero. This zero is put somewhere close to the
dominate pole f
over frequency. C
f
C
f
C
R
C
FB
EA
VEA
2
Z2
EA
CS
is desired crossover frequency. For best performance, f
C
C
is compensation capacitor in Figure 1.
=
is 0.8V,
is the error amplifier transconductance, which is
is the error amplifier transconductance, which is
is the current sense circuit transconductance, which is 6.68
=
=
is the error amplifier voltage gain, which is 500 V/V, and
=
C
C
40kHz
:
. Using selected crossover frequency, f
-6
-6
-----------------------------------
2π
-----------------------------------
2π R
f
C
A/V,
A/V, and
×
C
2
×
×
for close loop must be selected. The system
and resistor R
--------- -
V
C
V
1.5
1
FB
C
O
C
P1
×
×
C
×
but lower than 1/5 of selected cross-
R
f
can is selected by:
P1
----------------------------- -
G
C
C
2π C
EA
and set the compensator zero
×
×
3
C
G
, is located at:
and C
2
CS
C
and resistor R
C
is to set the cross
AOZ1031AI
Page 10 of 15
C
C
, to calcu-
together
C
is