AN983B-BG-T-V8 Infineon Technologies, AN983B-BG-T-V8 Datasheet - Page 41
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AN983B-BG-T-V8
Manufacturer Part Number
AN983B-BG-T-V8
Description
IC PCI TO ETHERNET LAN 128-PQFP
Manufacturer
Infineon Technologies
Datasheet
1.AN983B-BG-T-V8.pdf
(116 pages)
Specifications of AN983B-BG-T-V8
Applications
Ethernet Controller
Interface
USB
Voltage - Supply
3 V ~ 3.6 V
Package / Case
128-BFQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AN983BBGTV8
SP000074652
SP000074652
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AN983B-BG-T-V8
Manufacturer:
Infineon Technologies
Quantity:
10 000
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CSD_CR1
Configuration Command and Status
Field
SPE
SES
SMA
STA
Res
SDST
SDPR
SFBB
Res
NC
Res
CSE
Res
Data Sheet
Bits
31
30
29
28
27
26:25
24
23
22:21
20
19:9
8
7
Type
rw
rw
rw
rw
ro
ro
rw
ro
ro
ro
ro
rw
ro
Registers and Descriptors DescriptionAN983B/BX Configuration Registers
Description
Status of Parity Error
1
Status of System Error
1
Status of Master Abort
1
Status of Target Abort
1
Reserved
Status of Device Select Timing
The timing of the assertion of device select.
01
Status of Data Parity Report
1: when three conditions are met:
AN983B/BX asserted parity error - PERR# or it detected parity error
asserted by other device. AN983B/BX is operating as a bus master.
AN983B/BX’s parity error response bit (bit 6 of CR1) is enabled.
Status of Fast Back-to-Back
Always 1, since AN983B/BX has the ability to accept fast back-to-back
transactions.
Reserved
New Capabilities
This bit indicates that whether the AN983B/BX provides a list of extended
capabilities, such as PCI power management.
0
1
Reserved
Command of System Error Response
1
Reserved
B
B
B
B
B
B
B
B
in this condition even if the parity error response (bit 6 of CR1) is
disabled.
a master transaction
master transaction
when it find a parity error on the address phase.
, means that AN983B/BX detected a parity error. This bit will be set
, means that AN983B/BX received a target abort and terminated a
, means that AN983B/BX asserted the system error pin
, means that AN983B/BX received a master abort and terminated
, means a medium assertion of DEVSEL#
, the AN983B/BX doesn’t provide New Capabilities
, the AN983B/BX provides the PCI management function
, enable system error response. AN983B/BX will assert SERR#
Offset
04
41
H
Rev. 1.81, 2005-12-15
AN983B/BX
Reset Value
0290 0000
H
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