OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 23

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OM13013,598

Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of OM13013,598

Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
NXP Semiconductors
LPC122X
Objective data sheet
7.17.1 Features
7.18.1 Crystal oscillators
7.17 Real-time clock (RTC)
7.18 Clocking and power control
The RTC provides a basic alarm function or can be used as a long time base counter. The
RTC generates an interrupt after counting for a programmed number of cycles of the RTC
clock input.
The LPC122x include four independent oscillators. These are the system oscillator, the
Internal RC oscillator (IRC), the RTC 32 kHz oscillator (for the RTC only), and the
Watchdog oscillator. Except for the RTC oscillator, each oscillator can be used for more
than one purpose as required in a particular application.
Following reset, the LPC122x will operate from the Internal RC oscillator until switched by
software. This allows systems to operate without any external crystal and the bootloader
code to operate at a known frequency.
See
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) source can be selected from the Internal RC oscillator
(IRC) or the Watchdog oscillator. This gives a wide range of potential timing choices of
Watchdog operation under different power reduction conditions. It also provides the
ability to run the WDT from an entirely internal source that is not dependent on an
external crystal and its associated components and wiring for increased reliability.
Uses dedicated 32 kHz ultra low-power oscillator.
Selectable clock inputs: RTC oscillator (1 Hz, delayed 1 Hz, or 1 kHz clock) or main
clock with programmable clock divider.
32-bit counter.
Programmable 32-bit match/compare register.
Software maskable interrupt when counter and compare registers are identical.
Generates wake-up from Deep-sleep and Deep power-down modes.
Figure 5
for an overview of the LPC122x clock generation.
All information provided in this document is subject to legal disclaimers.
cy(WDCLK)
Rev. 1.2 — 29 March 2011
 4.
cy(WDCLK)
 256  4) to (T
32-bit ARM Cortex-M0 microcontroller
cy(WDCLK)
 2
LPC122x
© NXP B.V. 2011. All rights reserved.
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 4) in
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