M58WR032KU70ZA6U NUMONYX, M58WR032KU70ZA6U Datasheet - Page 102
M58WR032KU70ZA6U
Manufacturer Part Number
M58WR032KU70ZA6U
Description
NUMM58WR032KU70ZA6U NUM 32MB NOR FLASH P
Manufacturer
NUMONYX
Datasheet
1.M58WR032KU70ZA6U.pdf
(123 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M58WR032KU70ZA6U
Manufacturer:
ST
Quantity:
20 000
- Current page: 102 of 123
- Download datasheet (3Mb)
Common Flash Interface
Table 45.
1. The variable P is a pointer that is defined at CFI offset 15h.
2. Applies to M58WR016KU.
3. Applies to M58WR032KU.
4. Applies to M58WR064KU.
5. Bank Regions. There are two Bank Regions, see Tables 31, 32, 33, 34,
102/123
Offset
M58WR016KU,
M58WR032KU,
M58WR064KU
Bank and Erase block region 1 information
Data
(P+2C)h = 65h
(P+2D)h = 66h
(P+2A)h = 63h
(P+2B)h = 64h
(P+2E)h = 67h
(P+2F)h = 68h
(P+28)h = 61h
(P+29)h = 62h
Offset
M58WR016KL,
M58WR032KL,
M58WR064KL
Data
06h
00h
00h
01h
64h
00h
01h
03h
Bank Region 1 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized erase
blocks
Bits 16-31: n×256 = number of bytes in erase block region
Bank Region 1 (Erase Block Type 2)
Minimum block erase cycles × 1000
Bank Regions 1 (Erase Block Type 2): bits per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
Bank Region 1 (Erase Block Type 2): Page mode and
synchronous mode capabilities
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
(1)
35
(continued)
and 36.
Description
M58WRxxxKU, M58WRxxxKL
Related parts for M58WR032KU70ZA6U
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
Numonyx™ Embedded Flash Memory J3 V. D
Manufacturer:
Numonyx
Datasheet:
Part Number:
Description:
Manufacturer:
NUMONYX
Datasheet:
Part Number:
Description:
Manufacturer:
NUMONYX
Datasheet:
Part Number:
Description:
Manufacturer:
NUMONYX
Datasheet: