M58WR032KU70ZA6U NUMONYX, M58WR032KU70ZA6U Datasheet - Page 104

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M58WR032KU70ZA6U

Manufacturer Part Number
M58WR032KU70ZA6U
Description
NUMM58WR032KU70ZA6U NUM 32MB NOR FLASH P
Manufacturer
NUMONYX
Datasheet

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Common Flash Interface
Table 46.
1. The variable P is a pointer that is defined at CFI offset 15h.
2. Applies to M58WR016KL.
3. Applies to M58WR032KL.
4. Applies to M58WR064KL.
5. Bank Regions. There are two Bank Regions, see Tables 31, 32, 33, 34,
104/123
(P+3C)h = 75h
(P+3D)h = 76h
(P+36)h = 6Fh
(P+3A)h = 73h
(P+3B)h = 74h
(P+3E)h = 77h
(P+3F)h = 78h
(P+37)h = 70h
(P+38)h = 71h
(P+39)h = 72h
M58WR016KU,
M58WR032KU,
M58WR064KU
Offset
Bank and Erase block region 2 information
Data
07h
00h
20h
00h
64h
00h
01h
03h
(P+3E)h = 77h
(P+3F)h = 78h
Offset
M58WR016KL,
M58WR032KL,
M58WR064KL
Data
Bank Region 2 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized erase blocks
Bits 16-31: n×256 = number of bytes in erase block region
Bank Region 2 (Erase Block Type 2)
Minimum block erase cycles × 1000
Bank Region 2 (Erase Block Type 2): bits per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
Bits 5-7: reserved
Bank Region 2 (Erase Block Type 2): Page mode and
synchronous mode capabilities (defined in
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Feature space definitions
Reserved
(1)
35
(continued)
and 36.
Description
M58WRxxxKU, M58WRxxxKL
Table
43)

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