M58WR032KU70ZA6U NUMONYX, M58WR032KU70ZA6U Datasheet - Page 20

• Manufacturer Part Number: M58WR032KU70ZA6U
• Description: NUMM58WR032KU70ZA6U NUM 32MB NOR FLASH P
• Manufacturer: NUMONYX

Bus operations
3
3.1
3.2
3.3
3.4
20/123
Bus operations
There are six standard bus operations that control the device. These are Bus Read, Bus
Write, Address Latch, Output Disable, Standby and Reset. See
a summary.
Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the
memory and do not affect Bus Write operations.
Bus Read
Bus Read operations are used to output the contents of the Memory Array, the Electronic
Signature, the Status Register and the Common Flash Interface. Both Chip Enable and
Output Enable must be at V
should be used to enable the device. Output Enable should be used to gate data onto the
output. The data read depends on the previous command written to the memory (see
Command Interface section). See Figures 11,
24
Bus Write
Bus Write operations write Commands to the memory or latch Input Data to be
programmed. A bus write operation is initiated when Chip Enable and Write Enable are at
V
Write Enable or Chip Enable, whichever occurs first. The addresses must also be latched
prior to the write operation by toggling Latch Enable (when Chip Enable is at V
Enable must be tied to V
See Figures
Characteristics, for details of the timing requirements.
Address Latch
Address latch operations input valid addresses. Both Chip enable and Latch Enable must be
at V
Latch Enable.
Output Disable
The outputs are high impedance when the Output Enable is at V
IL
and
with Output Enable at V
IL
during address latch operations. The addresses are latched on the rising edge of
25
Read AC Characteristics, for details of when the output becomes valid.
16
and 17, Write AC Waveforms, and Tables
IH
during the bus write operation.
IH
IL
. Commands and Input Data are latched on the rising edge of
in order to perform a read operation. The Chip Enable input
12
and
13
Read AC Waveforms, and Tables
26
M58WRxxxKU, M58WRxxxKL
and 27, Write AC
Table 5: Bus
IH
.
operations, for
IL
). The Latch