M58WR032KU70ZA6U NUMONYX, M58WR032KU70ZA6U Datasheet - Page 35

• Manufacturer Part Number: M58WR032KU70ZA6U
• Description: NUMM58WR032KU70ZA6U NUM 32MB NOR FLASH P
• Manufacturer: NUMONYX

M58WRxxxKU, M58WRxxxKL
6.4
6.4.1
6.4.2
Quadruple Enhanced Factory Program command
The Quadruple Enhanced Factory Program command can be used to program one or more
pages of four adjacent words in parallel. The four words must differ only for the addresses
ADQ0 and ADQ1. V
the block is protected then the Quadruple Enhanced Factory Program operation will abort,
the data in the block will not be changed and the Status Register will output the error.
It has four phases: the Setup Phase, the Load Phase where the data is loaded into the
buffer, the combined Program and Verify Phase where the loaded data is programmed to
the memory and then automatically checked and reprogrammed if necessary and the Exit
Phase. Unlike the Enhanced Factory Program it is not necessary to resubmit the data for the
Verify Phase. The Load Phase and the Program and Verify Phase can be repeated to
program any number of pages within the block.
Setup Phase
The Quadruple Enhanced Factory Program command requires one Bus Write operation to
initiate the load phase. After the setup command is issued, read operations output the
Status Register data. The Read Status Register command must not be issued as it will be
interpreted as data to program.
Load Phase
The Load Phase requires 4 cycles to load the data (refer to
commands
word of each Page is written it is impossible to exit the Load phase until all four words have
been written.
Two successive steps are required to issue and execute the Load Phase of the Quadruple
Enhanced Factory Program command.
1.
2.
The memory is now set to enter the Program and Verify Phase.
Use one Bus Write operation to latch the Start Address and the first word of the first
Page to be programmed. For subsequent Pages the first word address can remain the
Start Address (in which case the next Page is programmed) or can be any address in
the same block. If any address with data FFFFh is given that is not in the same block as
the Start Address, the device enters the Exit Phase. For the first Load Phase Status
Register bit SR7 should be read after the first word has been issued to check that the
command has been accepted (bit SR7 set to ‘0’). This check is not required for
subsequent Load Phases.
Each subsequent word to be programmed is latched with a new Bus Write operation.
The address is only checked for the first word of each Page as the order of the words to
be programmed is fixed.
and
Figure 29: Quadruple enhanced factory program
PP
must be set to V
Command interface - Factory program commands
PPH
during Quadruple Enhanced Factory Program. If
Table 9: Factory Program
flowchart). Once the first
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