TE28F800C3TA110 Micron Technology Inc, TE28F800C3TA110 Datasheet - Page 44
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TE28F800C3TA110
Manufacturer Part Number
TE28F800C3TA110
Description
Manufacturer
Micron Technology Inc
Datasheet
1.TE28F800C3TA110.pdf
(70 pages)
Specifications of TE28F800C3TA110
Density
8Mb
Access Time (max)
110ns
Interface Type
Parallel
Boot Type
Top
Address Bus
19b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
512K
Supply Current
18mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TE28F800C3TA110
Manufacturer:
TI
Quantity:
201
10.2.2
10.3
10.3.1
Datasheet
44
maximum of 1000 cycles on the main blocks and 2500 cycles on the parameter blocks.
VPP may be connected to 12 V for a total of 80 hours maximum. Stressing the device
beyond these limits may cause permanent damage.
Suspending and Resuming Program
The Program Suspend command halts an in-progress program operation so that data
can be read from other locations of memory. Once the programming process starts,
issuing the Program Suspend command to the CUI requests that the WSM suspend the
program sequence at predetermined points in the program algorithm. The device
continues to output Status Register data after the Program Suspend command is
issued. Polling SR[7] and SR[2] will determine when the program operation has been
suspended (both will be set to “1”). The program-suspend latency is specified with
t
A Read-Array command can now be issued to the CUI to read data from blocks other
than that which is suspended. The only other valid commands while program is
suspended are Read Status Register, Read Identifier, CFI Query, and Program Resume.
After the Program Resume command is issued to the flash memory, the WSM will
continue with the programming process and SR[2] and SR[7] will automatically be
cleared. The device automatically outputs Status Register data when read (see
Figure 18, “Program Suspend / Resume Flowchart” on page
Resume command is issued. V
while in program-suspend mode. RP# must also remain at V
Erase Mode
To erase a block, issue the Erase Set-up and Erase Confirm commands to the CUI,
along with an address identifying the block to be erased. This address is latched
internally when the Erase Confirm command is issued. Block erasure results in all bits
within the block being set to “1.” Only one block can be erased at a time. The WSM will
execute a sequence of internally timed events to program all bits within the block to
“0,” erase all bits within the block to “1,” then verify that all bits within the block are
sufficiently erased. While the erase executes, status bit 7 is a “0.”
When the Status Register indicates that erasure is complete, check the erase-status bit
to verify that the Erase operation was successful. If the Erase operation was
unsuccessful, SR[5] of the Status Register will be set to a “1,” indicating an erase
failure. If V
issued, the WSM will not execute the erase sequence; instead, SR[5] of the Status
Register is set to indicate an erase error, and SR[3] is set to a “1” to identify that V
supply voltage is not within acceptable limits.
After an Erase operation, clear the Status Register (0x50) before attempting the next
operation. Any CUI instruction can follow after erasure is completed; however, to
prevent inadvertent status- register reads, Numonyx recommends that you place the
flash in read-array mode after the erase is complete.
Suspending and Resuming Erase
Since an Erase operation requires on the order of seconds to complete, an Erase
Suspend command is provided to allow erase-sequence interruption to read data
from—or program data to— another block in memory. Once the erase sequence is
started, issuing the Erase Suspend command to the CUI suspends the erase sequence
at a predetermined point in the erase algorithm. The Status Register indicates if/when
the Erase operation has been suspended. Erase-suspend latency is specified by t
t
WHRH1
EHRH2
.
/t
EHRH1
PP
is not within acceptable limits after the Erase Confirm command was
.
PP
must remain at the same V
57) after the Program
PP
IH
.
level used for program
C3 Discrete
March 2008
290645-24
WHRH2
PP
/