CYNSE70128-83BGC Cypress Semiconductor Corp, CYNSE70128-83BGC Datasheet - Page 10

• Manufacturer Part Number: CYNSE70128-83BGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE70128-83BGC

• Operating Supply Voltage (min): 1.425V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

3.0
The following subsections contain command and DQ bus (command and databus), database entry, arbitration logic, pipeline and
SRAM control, and full logic descriptions.
3.1
CMD[10:0] carries the command and its associated parameter. DQ[71:0] is used for data transfer to and from the database entries,
which comprise a data and a mask field that are organized as data and mask arrays. The DQ bus carries the search data during
the Search command as well as the address and data during Read and/or Write operations. The DQ bus also carries the address
information for the flow-through accesses to the external SRAMs and/or SSRAMs.
3.2
Each database entry comprises a data and a mask field. The resultant value of the entry is “1,” “0,” or “X (don’t care),” depending
on the value in the data and mask bits. The on-chip priority encoder selects the first matching entry in the database that is nearest
to location 0.
Document #: 38-02040 Rev. *F
Block Diagram
DQ[71:0]
CMD[10:0]
Command Bus and DQ Bus
Database Entry (Data Array and Mask Array)
Functional Description
CMDV
CLK1X/CLK2X
ACK
EOT
FULI[6:0]
CLK_MODE
PHS_L
RST_L
and PIO Access
ID[4:0]
Command
Decode
Full Logic
Search Successful Index Registers [7:0]
Global Mask Register Pairs [15:0]
Information and Command Register
Comparand Register Pairs [15:0]
Next-free Address Register
FULL
[All registers are 72 bits wide.]
Burst Read Register
Burst Write Register
CMD
Configurable as
Configurable as
FULO[1:0]
Compare/PIO Data
Mask Array
Data Array
32K × 144
16K × 288
32K × 144
16K × 288
LHI[6:0]
BHI[2:0]
64K × 72
64K × 72
Arbitration
Logic
Controller
TAP
LHO[1:0]
BHO[2:0]
SSF
SSV
Pipeline
Control
SRAM
and
CYNSE70128
TAP
OE_L
WE_L
CE_L
ALE_L
SADR[23:0]
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