CYNSE70128-83BGC Cypress Semiconductor Corp, CYNSE70128-83BGC Datasheet - Page 19

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CYNSE70128-83BGC

Manufacturer Part Number
CYNSE70128-83BGC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYNSE70128-83BGC

Operating Supply Voltage (min)
1.425V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
BGA
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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7.7
Table 7-6 describes the Write burst address register (WBURREG) fields which must be programmed before a burst Write.
Table 7-6. Write Burst Register Description
7.8
Bit [0] of each 72-bit data entry is specially designated for use in the operation of the Learn command. For 72-bit-configured
quadrants, this bit indicates whether a location is full (bit set to 1) or empty (bit set to 0). Every Write and/or Learn command loads
the address of the first 72-bit location that contains a 0 in the entry’s bit[0]. This is stored in the NFA register (see Table 7-7). If
all the bits[0] in a device are set to 1, the CYNSE70128 asserts FULO[1:0] to 1.
For a 144-bit-configured quadrants, the LSB of the NFA register is always set to 0. The host ASIC must set both bit[0] and bit[72]
in a 144-bit word to either 0 or 1 to indicate full or empty status. Both bit[0] and bit[72] must be set to either 0 or 1, (that is, the 10
or 01 settings are invalid).
Table 7-7. NFA Register
8.0
The CYNSE70128 consists of 64K × 72-bit storage cells referred to as data bits. There is a mask cell corresponding to each data
cell. Figure 8-1 shows the three organizations of the device based on the value of the CFG bits in the command register.
Document #: 38-02040 Rev. *F
BLEN
Field
ADR
Write Burst Address Register Description
NFA Register
NSE Architecture and Operation Overview
Range
[18:16]
[27:19]
[71:28]
[15:0]
CFG = 0000000000000000
Address
64 K
60
Initial Value
Figure 8-1. CYNSE70128 Database Width Configuration
0
0
72
Address. This is the starting address of the data or mask array during a burst
Write operation. It automatically increments by one for each successive Write of
the data or mask array. Once the operation is complete, the contents of this field
must be reinitialized for the next operation.
Reserved.
Length of Burst Access. The device provides the capability to write from 4–511
locations in a single burst. The BLEN decrements automatically. Once the
operation is complete, the contents of this field must be reinitialized for the next
operation.
Reserved.
CFG = 0101010101010101
32 K
Data
Reserved
Masks
71 – 16
144
16 K
CFG = 1010101010101010
Description
Data
Masks
288
15 – 0
Index
CYNSE70128
Page 19 of 137

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