PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 10

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

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Table of Contents
9.0
Device Characteristics
9.1
9.2
9.3
9.4
8.4.2
8.4.3
8.4.4
GENERAL DC ELECTRICAL CHARACTERISTICS ............................................................... 135
9.1.1
9.1.2
9.1.3
9.1.4
DC CHARACTERISTICS OF PINS, BY I/O BUFFER TYPES ................................................ 135
9.2.1
9.2.2
9.2.3
9.2.4
9.2.5
9.2.6
9.2.7
9.2.8
9.2.9
INTERNAL RESISTORS ......................................................................................................... 138
9.3.1
9.3.2
AC ELECTRICAL CHARACTERISTICS .................................................................................. 139
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
9.4.6
9.4.7
9.4.8
9.4.9
9.4.10
9.4.11
9.4.12
9.4.13
IR Mode Register Bank Overview ............................................................................. 131
SP2 Register Map for IR Functionality ...................................................................... 132
SP2 Bitmap Summary for IR Functionality ................................................................ 133
Recommended Operating Conditions ....................................................................... 135
Absolute Maximum Ratings ....................................................................................... 135
Capacitance .............................................................................................................. 135
Power Consumption under Recommended Operating Conditions ............................ 135
Input, CMOS Compatible ........................................................................................... 136
Input, PCI 3.3V .......................................................................................................... 136
Input, Strap Pin .......................................................................................................... 136
Input, TTL Compatible ............................................................................................... 136
Input, TTL Compatible with Schmitt Trigger .............................................................. 137
Output, PCI 3.3V ....................................................................................................... 137
Output, Totem-Pole Buffer ......................................................................................... 137
Output, Open-Drain Buffer ......................................................................................... 137
Exceptions ................................................................................................................. 137
Pull-Up Resistor ......................................................................................................... 138
Pull-Down Resistor .................................................................................................... 138
AC Test Conditions .................................................................................................... 139
Clock Timing .............................................................................................................. 139
LCLK and LRESET .................................................................................................... 140
LPC and SERIRQ Signals ......................................................................................... 141
Serial Port, Sharp-IR, SIR and Consumer Remote Control Timing ........................... 142
Modem Control Timing .............................................................................................. 143
FDC Write Data Timing ............................................................................................. 143
FDC Drive Control Timing ......................................................................................... 144
FDC Read Data Timing ............................................................................................. 144
Standard Parallel Port Timing .................................................................................... 145
Enhanced Parallel Port Timing .................................................................................. 145
Extended Capabilities Port (ECP) Timing .................................................................. 146
X-Bus Signals (PC87393 and PC87393F only)
(Continued)
10
...................................................... 147