PC87393VJG National Semiconductor, PC87393VJG Datasheet - Page 88

• Manufacturer Part Number: PC87393VJG
• Description: IC, SUPER I/O DEVICE, TQFP-100
• Manufacturer: National Semiconductor

Specifications of PC87393VJG

• Data Rate: 2Mbps
• Supply Voltage Range: 3V to 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 100
• Operating Temperature Range: 0°C to +70°C
• Termination Type: SMD
• Transceiver Type: Interface
• Rohs Compliant: No

www.national.com
5.0 Game Port (GMP)
5.3.2
This register affects the functionality of the Game Port only when operated in Enhanced mode (bit 0 of this register is set
to 1). Bits 1,2 and 4-7 affect Game Port functionality, as described in the table below.
Location:
Type:
Bit
Name
Reset
Required
Bit
7
6
5
4
3
2
1
0
Game Port Control Register (GMPCTL)
Device B Button 1 Debounce Enable. When set to 1, enables a 16 ms input debouncer on Device B Button 1
status input.
0: Disabled (default)
1: Enabled
Device B Button 0 Debounce Enable. Same as bit 7, but for Device B Button 0.
0: Disabled (default)
1: Enabled
Device A Button 1 Debounce Enable. Same as bit 7, but for Device A Button 1.
0: Disabled (default)
1: Enabled
Device A Button 0 Debounce Enable. Same as bit 7, but for Device A Button 0.
0: Disabled (default)
1: Enabled
Reserved
Device B Pre-Scale Enable. This bit determines the clock frequency used by Device B position counters.
0: 1 MHz (default)
1: 500 KHz
Device A Pre-Scale Enable. This bit determines the clock frequency used by Device A position counters.
0: 1 MHz (default)
1: 500 KHz
GMP Enhanced Mode Enable
0: Disabled (default)
1: Enabled
Offset 00h
R/W
Debounce
Device B
Button 1
Enable
7
0
Debounce
Device B
Button 0
Enable
(Continued)
6
0
Debounce
Device A
Button 1
Enable
5
0
Debounce
Device A
Button 0
Enable
Description
88
4
0
Reserved
3
0
0
Pre-Scale
Device B
Enable
2
0
Pre-Scale
Device A
Enable
1
0
Enhanced
Enable
Mode
GMP
0
0