NUC130VE3CN Nuvoton Technology Corporation of America, NUC130VE3CN Datasheet - Page 478

• Manufacturer Part Number: NUC130VE3CN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130VE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

A/D Control Register (ADCR)
Register
ADCR
Bits
[31]
[30:12]
[11]
DMOF
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
TRGCOND
Offset
ADC_BA+0x20
Descriptions
DMOF
Reserved
ADST
30
22
14
6
Reserved
R/W
R/W
A/D differential input Mode Output Format
1 = A/D Conversion result will be filled in RSLT at ADDRx registers with 2'complement
0 = A/D Conversion result will be filled in RSLT at ADDRx registers with unsigned
Reserved
A/D Conversion Start
1 = Conversion start
0 = Conversion stopped and A/D converter enter idle state
ADST bit can be set to 1 from two sources: software and external pin STADC. ADST
will be cleared to 0 by hardware automatically at the ends of single mode and single-
cycle scan mode. In continuous scan mode, A/D conversion is continuously performed
until software write 0 to this bit or chip reset.
29
21
13
5
format.
format.
Description
ADC Control Register
TRGS
28
20
12
4
- 478 -
Reserved
Reserved
ADST
27
19
11
3
Publication Release Date: June 14, 2011
ADMD
DIFFEN
26
18
10
2
PTEN
ADIE
25
17
9
1
Revision V2.01
Reset Value
0x0000_0000
TRGEN
ADEN
24
16
8
0