IDT82P2816BB IDT, Integrated Device Technology Inc, IDT82P2816BB Datasheet - Page 74

• Manufacturer Part Number: IDT82P2816BB
• Description: IC LIU T1/J1/E1 16+1CH 416-PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P2816BB

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 1.8V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: Defect and Alarm Detection, Driver Over-Current Detection and Protection, LLOS Detection, PRBSARB / IB Detection and Generation
• Number Of Transceivers: 1
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Power (watts): -
• Lead Free Status / RoHS Status: Not Compliant, Contains lead / RoHS non-compliant
• Other names: 82P2816BB

GCF - Global Configuration Register
Address: 080H
Type: Read / Write
Default Value: 03H
Programming Information
IDT82P2816
7 - 5
3 - 2
Bit
4
1
0
7
-
INT_PIN[1:0]
TMOV_IM
GLB_IM
Name
COPY
-
6
-
Reserved.
When the per-channel register of one channel is written, this bit determines whether the written value is copied to the same reg-
ister of the other channels simultaneously.
0: Disable. (default)
1: Enable.
These two bits control the output on the INT pin.
X0: Open drain, active low. (default)
01: Push-pull, active low.
11: Push-pull, active high.
This bit is a global configuration interrupt mask bit.
0: The per-channel interrupt will be generated when the per-channel interrupt mask bit is ‘0’ and the corresponding interrupt sta-
tus bit is ‘1’.
1: Mask all the per-channel interrupts. None per-channel interrupts can be generated. (default)
This bit controls whether the interrupt is generated when one second time is over. This one second timer is locked to MCLK.
0: Enable.
1: Mask. (default)
5
-
COPY
4
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
74
INT_PIN1
3
Description
INT_PIN0
2
GLB_IM
1
February 6, 2009
TMOV_IM
0