PEB20320H-V34 Infineon Technologies, PEB20320H-V34 Datasheet - Page 119
PEB20320H-V34
Manufacturer Part Number
PEB20320H-V34
Description
IC CONTROLR 32-CH HDLC 160-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB20320H-V34.pdf
(252 pages)
Specifications of PEB20320H-V34
Function
Multichannel Network Interface Controller (MUNICH)
Interface
HDLC, V.110, X.30
Voltage - Supply
5V
Current - Supply
100mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-BSQFP
Includes
Automatic Flag Detection, CRC Generation and Checking, Error Detection, Interframe-Time-Fill Change Detection
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power (watts)
-
Number Of Circuits
-
Other names
PEB20320H-V34
PEB20320H-V34IN
PEB20320H-V34IN
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
PEB20320H-V34
Manufacturer:
Infineon Technologies
Quantity:
10 000
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V.110/X.30
Receive Direction
General Features
In receive direction
– the starting sequence (00
– the synchronization pattern is monitored, after 3 consecutive
– a change of E-, S-, X-bits is monitored and reported by an interrupt.
– the data bits are extracted and written into the data section.
More detailed description of the individual features:
1. and 2. the receiver can be in one of 2 states:
Figure 69
Data extraction and monitoring of a change of E-, S-, X-bits and synchronization pattern
is only performed in synchronized state.
In the asynchronous state the receiver waits for the synchronization patter. The ‘1’-bit is
then interpreted as bit 1 of octet 2.
3. During the synchronized state a change of E, S, X-bits from one frame to the next and
4. The bits written into the data section are marked by
User’s Manual
loss of synchronism is detected.
erroneous frames a loss of synchronism is detected.
even within a frame (for SA, SB bits) is monitored. Only one interrupt per frame is
reported even if SA e.g. changes 3 times within the frame. The E-, S-, X-bits reported
in the interrupt are S9 for SB and S8 for SA and the second occurrence of X for X.
shown, bits repeated in the serial data are only strobed than at their last instance.
8 * "0" bit followed
by a "1" bit
H
followed by a ‘1’-bit) after initialization of
Unsynchronous State
Synchronous State
RESET
119
ITD05039
3 Consecutive Erroneous Frames
(with a Frame Error)
O
in Table 2 to Table 4. As
Functional Description
PEB 20320
01.2000
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