PEB20320H-V34 Infineon Technologies, PEB20320H-V34 Datasheet - Page 27

• Manufacturer Part Number: PEB20320H-V34
• Description: IC CONTROLR 32-CH HDLC 160-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB20320H-V34

• Function: Multichannel Network Interface Controller (MUNICH)
• Interface: HDLC, V.110, X.30
• Voltage - Supply: 5V
• Current - Supply: 100mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-BSQFP
• Includes: Automatic Flag Detection, CRC Generation and Checking, Error Detection, Interframe-Time-Fill Change Detection
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -
• Number Of Circuits: -
• Other names: PEB20320H-V34; PEB20320H-V34IN

MUNICH32’s bus interface consists of a 32 bit bidirectional data bus (D31 … D0), 32/28
Address lines (A31 … A2, BE3 … BE0) or (A27 … A2, BE3 … BE0), four data byte
parity lines DP(3:0), five lines (W/R/R/W, ADS/AS, DS/PCHK, BERR READY/DSACK)
to control and monitor the bus cycle, one action request and one Interrupt line.
The system bus allocation is controlled by the four signals (HOLD/BR, HLDA/BG,
BGACK, HLDAO/BGO). A mode pin allows the bus interface to be configured for either
Intel or Motorola mode. An operation mode pin B16 enables the transfer of a 32 bit long
word in two consecutive 16 bit word operations.
Figure 7, Figure 8, Figure 9, Figure 10 and Figure 11 illustrate how the MUNICH32
may be used in different applications, like in a Primary Rate Interface, a Router, a Packet
Switch and a Central D-Channel Handler, as part of an ISDN switching system.
Figure 7
Architecture of a Primary Access Board
User’s Manual
PCM
System
Interface
MUNICH32
PEB
PEB
INT/INT
FALC54
20320
2254
AR
Line
Interface
T1/S2 Line
CPU Bus Arbitration
27
Local CPU Bus
System Bus
System Bus
Controller
Controller
Interrupt
CPU
Host Interface
(Alternative B)
Host Interface
(Alternative A)
Memory
System
Introduction
PEB 20320
ITS07372
01.2000