SC16IS762IBS,157 NXP Semiconductors, SC16IS762IBS,157 Datasheet - Page 10
![IC DUAL UART 64BYTE 32HVQFN](/photos/6/51/65170/568-32-hvqfn_sml.jpg)
SC16IS762IBS,157
Manufacturer Part Number
SC16IS762IBS,157
Description
IC DUAL UART 64BYTE 32HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.SC16IS752IBS151.pdf
(59 pages)
Specifications of SC16IS762IBS,157
Features
Low Current
Number Of Channels
2, DUART
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935279293157
SC16IS762IBS
SC16IS762IBS
SC16IS762IBS
SC16IS762IBS
NXP Semiconductors
SC16IS752_SC16IS762_7
Product data sheet
Fig 6.
(1) When CTS is LOW, the transmitter keeps sending serial data out.
(2) When CTS goes HIGH before the middle of the last stop bit of the current character, the transmitter finishes sending the current
(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.
character, but it does not send the next character.
CTS functional timing
7.2.2 Auto-CTS
CTS
TX
7.3 Software flow control
Figure 6
sending the next data character. When CTS is active, the transmitter sends the next
character. To stop the transmitter from sending the following character, CTS must be
deasserted before the middle of the last stop bit that is currently being sent. The
Auto-CTS function reduces interrupts to the host system. When flow control is enabled,
CTS level changes do not trigger host interrupts because the device automatically
controls its own transmitter. Without Auto-CTS, the transmitter sends any data present in
the transmit FIFO and a receiver overrun error may result.
Software flow control is enabled through the Enhanced Features Register and the Modem
Control Register. Different combinations of software flow control can be enabled by setting
different combinations of EFR[3:0].
Table 3.
EFR[3]
0
1
0
1
X
X
X
1
0
1
0
shows CTS functional timing. The transmitter circuitry checks CTS before
start
EFR[2]
0
0
1
1
X
X
X
0
1
1
0
Software flow control options (EFR[3:0])
bit 0 to bit 7
EFR[1]
X
X
X
X
0
1
0
1
1
1
1
Dual UART with I
Rev. 07 — 19 May 2008
stop
EFR[0]
X
X
X
X
0
0
1
1
1
1
1
Table 3
2
TX, RX software flow control
no transmit flow control
transmit Xon1, Xoff1
transmit Xon2, Xoff2
transmit Xon1 and Xon2, Xoff1 and Xoff2
no receive flow control
receiver compares Xon1, Xoff1
receiver compares Xon2, Xoff2
transmit Xon1, Xoff1
receiver compares Xon1 or Xon2, Xoff1 or Xoff2
transmit Xon2, Xoff2
receiver compares Xon1 or Xon2, Xoff1 or Xoff2
transmit Xon1 and Xon2, Xoff1 and Xoff2
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
no transmit flow control
receiver compares Xon1 and Xon2, Xoff1 and Xoff2
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
shows software flow control options.
start
bit 0 to bit 7
002aab041
stop
© NXP B.V. 2008. All rights reserved.
10 of 59