SC16IS762IBS,157 NXP Semiconductors, SC16IS762IBS,157 Datasheet - Page 30
![IC DUAL UART 64BYTE 32HVQFN](/photos/6/51/65170/568-32-hvqfn_sml.jpg)
SC16IS762IBS,157
Manufacturer Part Number
SC16IS762IBS,157
Description
IC DUAL UART 64BYTE 32HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.SC16IS752IBS151.pdf
(59 pages)
Specifications of SC16IS762IBS,157
Features
Low Current
Number Of Channels
2, DUART
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935279293157
SC16IS762IBS
SC16IS762IBS
SC16IS762IBS
SC16IS762IBS
NXP Semiconductors
SC16IS752_SC16IS762_7
Product data sheet
8.13 Transmitter FIFO Level register (TXLVL)
8.14 Receiver FIFO Level register (RXLVL)
8.15 Programmable I/O pins Direction register (IODir)
8.16 Programmable I/O pins State register (IOState)
This register is a read-only register. It reports the number of spaces available in the
transmit FIFO.
Table 24.
This register is a read-only register, it reports the fill level of the receive FIFO, that is, the
number of characters in the RX FIFO.
Table 25.
This register is used to program the I/O pins direction. Bit 0 to bit 7 controls GPIO0 to
GPIO7.
Table 26.
When ‘read’, this register returns the actual state of all I/O pins. When ‘write’, each
register bit will be transferred to the corresponding I/O pin programmed as output.
Table 27.
Bit
7
6:0
Bit
7
6:0
Bit
7:0
Bit
7:0
Symbol
-
TXLVL[6:0]
Symbol
-
RXLVL[6:0]
Symbol
IODir
Symbol
IOState
Transmitter FIFO Level register bits description
Receiver FIFO Level register bits description
IODir register bits description
IOState register bits description
Dual UART with I
Rev. 07 — 19 May 2008
Description
not used; set to zeros
number of spaces available in TX FIFO, from 0 (0x00) to 64 (0x40)
Description
not used; set to zeros
number of characters stored in RX FIFO, from 0 (0x00) to 64 (0x40)
Description
Set GPIO pins [7:0] to input or output.
Description
Write this register: set the logic level on the output pins
Read this register: return states of all pins
0 = input
1 = output
0 = set output pin to zero
1 = set output pin to one
2
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
© NXP B.V. 2008. All rights reserved.
30 of 59