SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 78
SC28L201A1DGG,118
Manufacturer Part Number
SC28L201A1DGG,118
Description
IC UART W/FIFO 48-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L201A1DGG118.pdf
(110 pages)
Specifications of SC28L201A1DGG,118
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935277824118
SC28L201A1DGG-T
SC28L201A1DGG-T
SC28L201A1DGG-T
SC28L201A1DGG-T
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Philips Semiconductors
9397 750 13138
Product data sheet
8.6.7 Input Change Detect Enable, A (IPCE)
IPCE[7:0] bits activate the input change of state detectors. If a pin is configured as an
output, the change of state detectors, if enabled, continue to be active and will show a
change of state as the I/P port changes.
Table 67:
Bit
7
6
5
4
3
2
1
0
Symbol
IPCE - Input Change Detect Enable register, A (address 0x32) bit description
Description
Rev. 01 — 31 October 2005
I/O7A enable.
I/O6A enable.
I/O5A enable.
I/O4A enable.
I/O3A enable.
I/O2A enable.
I/O1A enable.
I/O0A enable.
0 = disable
1 = enable
0 = disable
1 = enable
0 = disable
1 = enable
0 = disable
1 = enable
0 = disable
1 = enable
0 = disable
1 = enable
0 = disable
1 = enable
0 = disable
1 = enable
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
SC28L201
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