SC28L201A1DGG,118 NXP Semiconductors, SC28L201A1DGG,118 Datasheet - Page 98
SC28L201A1DGG,118
Manufacturer Part Number
SC28L201A1DGG,118
Description
IC UART W/FIFO 48-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L201A1DGG118.pdf
(110 pages)
Specifications of SC28L201A1DGG,118
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935277824118
SC28L201A1DGG-T
SC28L201A1DGG-T
SC28L201A1DGG-T
SC28L201A1DGG-T
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Philips Semiconductors
9397 750 13138
Product data sheet
Fig 8. Bus timing (80xxx mode)
Fig 9. Bus timing, read cycle (68000 mode)
X1/SCLK
D0 to D7
D0 to D7
D0 to D7
A0 to A6
A0 to A6
DACKN LOW requires two rising edges of X1 clock after CEN is LOW.
DACKN
(write)
(read)
R/WN
RDN
WRN
CEN
CEN
t
d(RL-D)(act)
t
su(An-RWL)
float
Rev. 01 — 31 October 2005
t
t
su(An-RWL)
su(RWL-CEN)
t
h(RWL-An)
t
t
not valid
su(RWL-CEN)
t
not valid
Dv(RL)
t
Dv(CENL)
CSC
t
w(RWL)
t
h(RWL-An)
3.3 V, 5 V UART, 3.125 Mbit/s, with 256-byte FIFO
t
su(D)
valid
valid
t
DCR
data valid
t
d(D)(float)
t
h(D)
t
h(RWH-CEN)
t
t
d(RWD)
d(RWD)
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
t
DAT
t
float
t
d(D)(float)
d(RWD)
SC28L201
t
h(RWH-CEN)
002aab475
002aab476
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