AT89C51CC01 Atmel Corporation, AT89C51CC01 Datasheet - Page 145
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AT89C51CC01
Manufacturer Part Number
AT89C51CC01
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C51CC01.pdf
(167 pages)
2.AT89C51CC01.pdf
(12 pages)
3.AT89C51CC01.pdf
(32 pages)
4.AT89C51CC01.pdf
(29 pages)
Specifications of AT89C51CC01
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
34
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
1.25
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes
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4129N–CAN–03/08
Notes:
Figure 64. I
1. Operating I
2. Idle I
3. Power-down I
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be super-
5. Typicals are based on a limited number of samples and are not guaranteed. The val-
6. Under steady state (non-transient) conditions, I
7. ICC_FLASH_WRITE operating current while a Flash block write is on going.
8. Flash Retention is guaranteed with the same formula for V
T
V
if a crystal oscillator used (see Figure 64.).
T
= V
V
and the POF flag must be set.
imposed on the V
capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0
transitions during bus operation. In the worst cases (capacitive loading 100pF), the
noise pulse on the ALE line may exceed 0.45V with maxi V
Trigger use is not necessary.
ues listed are at room temperature.
lows:
Maximum I
Maximum I
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total I
If I
not guaranteed to sink current greater than the listed test conditions.
CLOCK
SIGNAL
CC
CLCH
IH
CHCL
CC
OL
SS
= V
; XTAL2 NC.; RST = V
Test Condition, Active Mode
(NC)
CC
exceeds the test condition, V
, T
(see Figure 65.).
= 5 ns, V
CC
CHCL
is measured with all output pins disconnected; XTAL1 driven with T
V
- 0.5V; XTAL2 N.C.; EA = RST = Port 0 = V
OL
OL
CC
CC
= 5 ns (see Figure 67.), V
CC
per port pin: 10 mA
per 8-bit port:
is measured with all output pins disconnected; XTAL1 driven with
IL
OL
RST
XTAL2
XTAL1
V
is measured with all output pins disconnected; EA = V
= V
SS
OL
for all output pins: 71 mA
s of ALE and Ports 1 and 3. The noise is due to external bus
SS
V
+ 0.5V, V
EA
CC
I
P0
CC
SS
V
(see Figure 66.). In addition, the WDT must be inactive
CC
V
IH
CC
= V
OL
may exceed the related specification. Pins are
CC
IL
= V
- 0.5V; XTAL2 N.C; Port 0 = V
SS
All other pins are disconnected.
+ 0.5V,
OL
must be externally limited as fol-
CC
. I
CC
CC
OL
would be slightly higher
Min down to 0.
peak 0.6V. A Schmitt
CC
CC
; EA = RST
, PORT 0 =
CLCH
145
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