AT89C51CC01 Atmel Corporation, AT89C51CC01 Datasheet - Page 42

• Manufacturer Part Number: AT89C51CC01
• Manufacturer: Atmel Corporation

Specifications of AT89C51CC01

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 40 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Uart: 1
• Can: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 1.25
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART/CAN
• Watchdog: Yes

Flash Protection from Parallel
Programming
Preventing Flash Corruption
42
A/T89C51CC01
Figure 24. Reading Procedure
Note:
The three lock bits in Hardware Security Byte (see "In-System-Programming" section)
are programmed according to Table 27 provide different level of protection for the on-
chip code and data located in FM0 and FM1.
The only way to write these bits are the parallel mode. They are set by default to level 4
Table 27. Program Lock bit
Program Lock bits
U: unprogrammed
P: programmed
WARNING: Security level 2 and 3 should only be programmed after Flash and Core
verification.
See the “Power Management” section.
Security
Level
1
2
3
4
Program Lock Bits
1. aa = 10 for the Hardware Security Byte.
LB0
U
P
U
U
LB1
U
U
P
U
LB2
U
U
U
P
Protection Description
No program lock features enabled. MOVC instruction executed from
external program memory returns non coded data.
MOVC instructions executed from external program memory are barred
to return code bytes from internal memory, EA is sampled and latched
on reset, and further parallel programming of the Flash is disabled.
Same as 2, also verify through parallel programming interface is
disabled.
Same as 3, also external execution is disabled if code roll over beyond
7FFFh
Exec: MOVC A, @A+DPTR
Flash Spaces Reading
Flash Spaces Mapping
FCON = 0000aa0b
DPTR = Address
FCON = 00h
Clear Mode
Data Read
ACC = 0
(1)
4129N–CAN–03/08