AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 119
AT90PWM81
Manufacturer Part Number
AT90PWM81
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT90PWM161.pdf
(325 pages)
Specifications of AT90PWM81
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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12.8.4.3
7734P–AVR–08/10
Input Mode Operation
If PELEVnx bit set, the significant edge of PSCn Input A or B is rising (edge modes) or the active level is
high (level modes) and vice versa for unset/falling/low
- In 2- or 4-ramp mode, PSCn Input A is taken into account only during Dead-Time0 and On-Time0
period (respectively Dead-Time1 and On-Time1 for PSCn Input B).
- In 1-ramp-mode PSC Input A or PSC Input B act on the whole ramp.
Thanks to 4 configuration bits (PRFM3:0), it’s possible to define the mode of the PSC input. All
Table 12-7.
Notice: All following examples are given with rising edge or high level active inputs.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PRFM3:0
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
PSC Input Mode Operation
Description
PSCn Input has no action on PSC output
12.9See “PSC Input Mode 1: Stop signal, Jump to Opposite Dead-Time and
Wait” on page 120.
See “PSC Input Mode 2: Stop signal, Execute Opposite Pulse and Wait” on page
121.
See “PSC Input Mode 3: Stop signal, Execute Opposite Pulse while Fault active”
on page 122.
See “PSC Input Mode 4: Deactivate outputs without changing timing.” on page
123.
See “PSC Input Mode 5: Stop signal and Insert Dead-Time” on page 123.
See “PSC Input Mode 6: Stop signal, Jump to Opposite Dead-Time and Wait.”
on page 124.
See “PSC Input Mode 7: Halt PSC and Wait for Software Action” on page 124.
See “PSC Input Mode 8: Edge Retrigger PSC” on page 125.
See “PSC Input Mode 9: Fixed Frequency Edge Retrigger PSC” on page 126.
Reserved : Do not use
See “PSC Input Mode 14: Fixed Frequency Edge Retrigger PSC and Deactivate
Output” on page 127.
Reserved : Do not use
AT90PWM81
119
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