AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 131

• Manufacturer Part Number: AT90PWM81
• Manufacturer: Atmel Corporation

Specifications of AT90PWM81

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 20
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 3
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.25
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 1
• Output Compare Channels: 8
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

12.22 PSC Synchronization
12.22.1
7734P–AVR–08/10
Fault events in Autorun mode
Note : In AT90PWM81, this feature is not relevant and PRUN2, PARUN2 are stuck at zero.
2 or 3 PSC can be synchronized together. In this case, two waveform alignments are possible:
Figure 12-41. PSC Run Synchronization
If the PSCm has its PARUNn bit set, then it can start at the same time than PSCn-1.
PRUNn and PARUNn bits are located in PCTLn register.
139.
Note : Do not set the PARUNn bits on the three PSC at the same time.
Thanks to this feature, we can for example configure two PSC in slave mode (PARUNn = 1 / PRUNn = 0)
and one PSC in master mode (PARUNm = 0 / PRUNm = 0). This PSC master can start all PSC at the
same moment ( PRUNm = 1).
To complete this master/slave mechanism, fault event (input mode 7) is propagated from PSCn-1 to PSCn
and from PSCn to PSCn-1.
A PSC which propagate a Run signal to the following PSC stops this PSC when the Run signal is
deactivate.
• The waveforms are center aligned in the Center Aligned mode if master and slaves are all with the
• The waveforms are edge aligned in the 1, 2 or 4 ramp mode
same PSC period (which is the natural use).
PRUN0
PARUN0
PRUN1
PARUN1
PRUN2
PARUN2
SY0In
SY1In
SY2In
SY0Out
SY1Out
SY2Out
Run PSC0
Run PSC1
Run PSC2
See “PSC 2 Control Register – PCTL2” on page
PSC0
PSC1
PSC2
AT90PWM81
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