AT90PWM81 Atmel Corporation, AT90PWM81 Datasheet - Page 84
AT90PWM81
Manufacturer Part Number
AT90PWM81
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT90PWM161.pdf
(325 pages)
Specifications of AT90PWM81
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
20
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
3
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.25
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
1
Output Compare Channels
8
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
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Manufacturer
Quantity
Price
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AT90PWM81-16MF
Manufacturer:
Atmel
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3 118
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Part Number:
AT90PWM81-16MN
Manufacturer:
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2 446
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1 500
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11. Reduced 16-bit Timer/Counter1
11.1
84
Overview
AT90PWM81
The 16-bit Timer/Counter unit allows accurate program execution timing (event management). The main
features are:
•
•
•
•
•
Most register and bit references in this section are written in general form. A lower case “n” replaces the
Timer/Counter number, and a lower case “x” replaces the Output Compare unit channel. However, when
using the register or bit defines in a program, the precise form must be used, i.e., TCNT1 for accessing
Timer/Counter1 counter value and so on.
A simplified block diagram of the 16-bit Timer/Counter is shown in
of I/O pins, refer to
I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the
Timer/Counter Register Description” on page
The PRTIM1 bit in
Timer/Counter1 module.
Clear Timer on Compare Match (Auto Reload)
One Input Capture Unit
Input Capture Noise Cancelerr
External Event Counter
Two independent interrupt Sources (TOV1, ICF1)
“Pin out description” on page
“Power Reduction Register” on page 45
96.
6. CPU accessible I/O Registers, including I/O bits and
Figure
must be written to zero to enable
11-1. For the actual placement
7734P–AVR–08/10
“16-bit
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