ATmega644R212 Atmel Corporation, ATmega644R212 Datasheet - Page 17
ATmega644R212
Manufacturer Part Number
ATmega644R212
Description
Manufacturer
Atmel Corporation
Specifications of ATmega644R212
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
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6.1
Figure 6-2.
Figure 6-3.
8111C–MCU Wireless–09/09
SPI Timing Description
/SEL
SCLK
MOSI
MISO
/SEL
SCLK
MOSI
MISO
SPI Timing, Global Map and Definition of Timing Parameters t
SPI Timing, Detailed Drawing of Timing Parameter t
Bit 7
7
t
1
Bit 6 Bit 5
Table 6-1.
Pin 17 (CLKM) can be used as a microcontroller master clock source. If the microcontroller
derives the SPI master clock (SCLK) directly from CLKM, the SPI operates in synchronous
mode, otherwise in asynchronous mode.
In synchronous mode, the maximum SCLK frequency is 8 MHz.
In asynchronous mode, the maximum SCLK frequency is limited to 7.5 MHz. The signal at pin
CLKM is not required to derive SCLK and may be disabled to reduce power consumption and
spurious emissions.
Figure 6-2 on page 17
parameters. The corresponding timing parameter definitions t
“Digital Interface Timing Characteristics” on page
6
SLP_TR
/RST
DIG2
5
t
3
Bit 4
Bit 7
4
t
4
Bit 7
Bit 3 Bit 2 Bit 1 Bit 0
3
Signal Description of Microcontroller Interface (Continued)
2
Multipurpose control signal (functionality is state dependent, see
AT86RF231 reset signal, active low
Optional, IRQ_2 (RX_START) for RX Frame Time Stamping, see
1
t
2
0
and
-Sleep/Wakeup
-TX start
-disable/enable CLKM
t
5
Figure 6-3 on page 17
Bit 7
7
Bit 6
Bit 6
6
Bit 6 Bit 5
1
5
to t
4
Bit 4
4
3
Bit 3 Bit 2 Bit 1 Bit 0
enable/disable SLEEP state
157.
BUSY_TX_(ARET) state
5
RX_(AACK)_ON state
, t
illustrate the SPI timing and introduces its
2
6
, t
8
1
and t
Bit 5
0
Bit 5
9
1
- t
t
9
9
are defined in
t
6
AT86RF231
t
Section
8
Section 11.6
Section 12.4
6.5):
17
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