ATmega644R212 Atmel Corporation, ATmega644R212 Datasheet - Page 7
ATmega644R212
Manufacturer Part Number
ATmega644R212
Description
Manufacturer
Atmel Corporation
Specifications of ATmega644R212
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Max I/o Pins
32
Spi
3
Twi (i2c)
1
Uart
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
4
Eeprom (bytes)
2048
Operating Voltage (vcc)
1.8 to 3.6
Timers
3
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
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1.3
1.3.1
Table 1-3.
1.3.2
8111C–MCU Wireless–09/09
Pins
MISO, IRQ, DIG1,..., DIG4
CLKM
Digital Pins
Driver Strength Settings
Pull-Up and Pull-Down Configuration
Digital Output Driver Configuration
The AT86RF231 provides a digital microcontroller interface. The interface comprises a slave
SPI (/SEL, SCLK, MOSI and MISO) and additional control signals (CLKM, IRQ, SLP_TR, /RST
and DIG2). The microcontroller interface is described in detail in
Interface” on page
Additional digital output signals DIG1...DIG4 are provided to control external blocks, i.e. for
Antenna Diversity RF switch control or as an RX/TX Indicator, see
sity” on page 142
pulled-down to digital ground (DIG1/DIG2) or analog ground (DIG3/DIG4).
The driver strength of all digital output pins (MISO, IRQ, DIG1, DIG2, DIG3, DIG4) and CLKM
pin can be configured using register 0x03 (TRX_CTRL_0), see
The capacitive load should be as small as possible as, not larger than 50 pF when using the
2 mA minimum driver strength setting. Generally, the output driver strength should be adjusted
to the lowest possible value in order to keep the current consumption and the emission of digital
signal harmonics low.
All digital input pins are internally pulled-up or pulled-down in radio transceiver state P_ON, see
Section 7.1.2.1 “P_ON - Power-On after VDD” on page
pull-up and pull-down configuration.
Table 1-4.
In all other radio transceiver states, no pull-up or pull-down circuitry is connected to any of the
digital input pins mentioned in
figuration is disabled.
SLP_TR
SCLK
MOSI
/RST
/SEL
Pins
Pull-Up / Pull-Down Configuration of Digital Input Pins in P_ON State
Default Driver Strength
and
16.
Section 11.5 “RX/TX Indicator” on page
2 mA
4 mA
Table 1-4 on page
H
7. In RESET state, the pull-up / pull-down con-
=
Recommendation/Comment
Adjustable to 2 mA, 4 mA, 6 mA and 8 mA
Adjustable to 2 mA, 4 mA, 6 mA and 8 mA
ˆ
pull-up, L
34.
Table 1-4 on page 7
H
H
L
L
L
=
ˆ
Table 1-3 on page
pull-down
147. After reset, these pins are
Section 11.4 “Antenna Diver-
Section 6. “Microcontroller
AT86RF231
summarizes the
7.
7
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