ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 65

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Timer/Counter1
Prescaler
8-bit
Timer/Counter0
1477K–AVR–08/10
Figure 37 shows the Timer/Counter1 prescaler. For Timer/Counter1 the clock selections are
between PCK to PCK/16384 and stop in asynchronous mode and CK to CK/16384 and stop in
synchronous. The clock options are described in Table 34 on page 72 and the Timer/Counter1
Control Register, TCCR1B. Setting the PSR1 bit in TCCR1B Register resets the prescaler. The
PCKE bit in the PLLCSR Register enables the asynchronous mode.
Figure 37. Timer/Counter1 Prescaler
Figure 38 shows the block diagram for Timer/Counter0.
The 8-bit Timer/Counter0 can select clock source from CK, prescaled CK, or an external pin. In
addition, it can be stopped as described in the specification for the Timer/Counter0 Control Reg-
ister – TCCR0. The overflow status flag is found in the Timer/Counter Interrupt Flag Register –
TIFR. Control signals are found in the Timer/Counter0 Control Register – TCCR0. The interrupt
enable/disable settings for Timer/Counter0 are found in the Timer/Counter Interrupt Mask Regis-
ter – TIMSK.
When Timer/Counter0 is externally clocked, the external signal is synchronized with the oscilla-
tor frequency of the CPU. To ensure proper sampling of the external clock, the minimum time
between two external clock transitions must be at least one internal CPU clock period. The
external clock signal is sampled on the rising edge of the internal CPU clock.
The 8-bit Timer/Counter0 features both a high resolution and a high accuracy usage with the
lower prescaling opportunities. Similarly, the high prescaling opportunities make the
Timer/Counter0 useful for lower speed functions or exact timing functions with infrequent
actions.
(64 MHz)
PCKE
PCK
CK
S
A
CS10
CS11
CS12
CS13
PSR1
T1CK
0
TIMER/COUNTER1 COUNT ENABLE
T/C PRESCALER
14-BIT
65