ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 69

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

1477K–AVR–08/10
Figure 40. Timer/Counter1 Block Diagram
Three status flags (overflow and compare matches) are found in the Timer/Counter Interrupt
Flag Register – TIFR. Control signals are found in the Timer/Counter Control Registers TCCR1A
and TCCR1B. The interrupt enable/disable settings are found in the Timer/Counter Interrupt
Mask Register – TIMSK.
The Timer/Counter1 contains three Output Compare Registers, OCR1A, OCR1B, and OCR1C,
as the data source to be compared with the Timer/Counter1 contents. In normal mode the Out-
put Compare functions are operational with all three Output Compare Registers. OCR1A
determines action on the OC1A pin (PB1), and it can generate Timer1 OC1A interrupt in normal
mode and in PWM mode. Likewise, OCR1B determines action on the OC1B pin (PB3) and it can
generate Timer1 OC1B interrupt in normal mode and in PWM mode. OCR1C holds the
Timer/Counter maximum value, i.e., the clear on compare match value. An overflow interrupt
(TOV1) is generated when Timer/Counter1 counts from $FF to $00 or from OCR1C to $00. This
function is the same for both normal and PWM mode. The inverted PWM outputs OC1A and
OC1B are not connected in normal mode.
In PWM mode, OCR1A and OCR1B provide the data values against which the Timer/Counter
value is compared. Upon compare match the PWM outputs (OC1A, OC1A, OC1B, OC1B) are
generated. In PWM mode, the Timer/Counter counts up to the value specified in the Output
Compare Register OCR1C and starts again from $00. This feature allows limiting the counter
“full” value to a specified value, lower than $FF. Together with the many prescaler options, flexi-
ble PWM frequency selection is provided. Table 37 lists clock selection and OCR1C values to
obtain PWM frequencies from 20 kHz to 250 kHz in 10 kHz steps and from 250 kHz to 500 kHz
in 50 kHz steps. Higher PWM frequencies can be obtained at the expense of resolution.
8-BIT DATA BUS
COMPARE REGISTER
TIMER/COUNTER1
8-BIT COMPARATOR
REGISTER (TIMSK)
TIMER/COUNTER1
TIMER INT. MASK
T/C1 OUTPUT
T/C1 OVER-
FLOW IRQ
(OCR1A)
(TCNT1)
T/C1 COMPARE
MATCH A IRQ
T/C CLEAR
REGISTER (TIFR)
TIMER INT. FLAG
T/C1 COMPARE
MATCH B IRQ
COMPARE REGISTER
8-BIT COMPARATOR
T/C1 OUTPUT
(OCR1B)
(PB0)
OC1A
REGISTER 1 (TCCR1A)
REGISTER 1 (TCCR1A)
T/C1 CONTROL
T/C CONTROL
T/C CONTROL
OC1A
(PB1)
LOGIC
COMPARE REGISTER
8-BIT COMPARATOR
OC1B
(PB2)
T/C1 OUTPUT
(OCR1C)
REGISTER 1 (TCCR1B)
T/C CONTROL
OC1B
(PB3)
CK
PCK
69