ATtiny26 Atmel Corporation, ATtiny26 Datasheet - Page 99

• Manufacturer Part Number: ATtiny26
• Manufacturer: Atmel Corporation

Specifications of ATtiny26

• Flash (kbytes): 2 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 11
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.12
• Eeprom (bytes): 128
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

ADC Noise
Canceler Function
ADC Conversion
Result
1477K–AVR–08/10
Special care should be taken when changing differential channels. Once a differential channel
has been selected, the gain stage may take as much as 125 µs to stabilize to the new value.
Thus conversions should not be started within the first 125 µs after selecting a new differential
channel. Alternatively, conversion results obtained within this period should be discarded.
The same settling time should be observed for the first differential conversion after changing
ADC reference (by changing the REFS1:0 bits in ADMUX).
The ADC features a noise canceler that enables conversion during ADC Noise Reduction mode
(see “Power Management and Sleep Modes” on page 37) to reduce noise induced from the
CPU core and other I/O peripherals. If other I/O peripherals must be active during conversion,
this mode works equivalently for Idle mode. To make use of this feature, the following procedure
should be used:
1. Make sure that the ADC is enabled and is not busy converting. Single Conversion mode
2. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion once
3. If no other interrupts occur before the ADC conversion completes, the ADC interrupt will
After the conversion is complete (ADIF is high), the conversion result can be found in the ADC
Result Registers (ADCL, ADCH).
For single ended conversion, the result is
where V
Table 45 on page 101 and Table 46 on page 102). 0x000 represents analog ground, and 0x3FF
represents the selected reference voltage minus one LSB.
If differential channels are used, the result is
where V
GAIN the selected gain factor, and V
must be higher than V
decoding of the differential input range.
Table 44 shows the resulting output codes if the differential input channel pair (ADCn - ADCm) is
selected with a gain of GAIN and a reference voltage of V
must be selected and the ADC conversion complete interrupt must be enabled.
ADEN = 1
ADSC = 0
ADFR = 0
ADIE = 1
the CPU has been halted.
wake up the CPU and execute the ADC Conversion Complete interrupt routine.
IN
POS
is the voltage on the selected input pin and V
is the voltage on the positive input pin, V
NEG
, otherwise, the ADC value will saturate at 0x000. Figure 56 shows the
ADC
=
(
---------------------------------------------------------------------------
V
POS
ADC
REF
–
the selected voltage reference. Keep in mind that V
V
=
NEG
V
--------------------------
V
IN
REF
V
) GAIN 1024
⋅
REF
⋅
1024
NEG
REF
⋅
REF
the voltage on the negative input pin,
the selected voltage reference (see
.
POS
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