ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 194
ATxmega256A3U
Manufacturer Part Number
ATxmega256A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega256A3U
Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega256A3U-AU
Manufacturer:
TI
Quantity:
12 000
Part Number:
ATxmega256A3U-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega256A3U-MH
Manufacturer:
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Quantity:
1 450
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15.7
15.8
15.9
8331A–AVR–07/11
Interrupts and events
DMA Support.
Timer/Counter Commands
The T/C can generate both interrupts and events. The Counter can generate an interrupt on
underflow, and each CMP channel for Counter A has a separate interrupt that is used for
compare.
Event will be generated for all conditions that can generate interrupts. For details on event gen-
eration and available events refer to
Timer/Counter Underflow and Compare or Capture interrupt flags can trigger a DMA transaction.
The acknowledge condition that clears the flag/request is listed in the
Table 15-1.
A set of commands can be given to the Timer/Counter by software to immediately change the
state of the module. These commands give direct control of the Update, Restart, and Reset
signals.
The software can force a restart of the current waveform period by issuing a restart command. In
this case the Counter, direction, and all compare outputs are set to zero.
A reset command will set all Timer/Counter registers to their initial values. A reset can only be
given when the Timer/Counter is not running (OFF).
Request
UNFLIF
UNFHIF
CCIF{D,C,B,A}
DMA Request Sources
Acknowledge
DMAC writes to CNTL
DMAC writes to PERL
DMAC writes to CNTH
DMAC writes to PERH
DMAC access of
CMPL{D,C,B,A}
”Event System” on page
Atmel AVR XMEGA AU
63.
Comment
Output Compare operation
Table 15-1 on page
194.
194
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